Console Output

Started by timer
[Pipeline] Start of Pipeline
[Pipeline] node
Still waiting to schedule task
Waiting for next available executor
Running on Jenkins in /var/jenkins_home/workspace/pulpino
[Pipeline] {
[Pipeline] stage
[Pipeline] { (Git Clone)
[Pipeline] sh
+ rm -rf pulpino
[Pipeline] sh
+ git clone --recursive --depth=1 https://github.com/pulp-platform/pulpino pulpino
Cloning into 'pulpino'...
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Simulation)
[Pipeline] dir
Running in /var/jenkins_home/workspace/pulpino/pulpino
[Pipeline] {
[Pipeline] echo
simulation not supported for System Verilog files
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Utilities)
[Pipeline] dir
Running in /var/jenkins_home/workspace/pulpino/pulpino
[Pipeline] {
[Pipeline] sh
+ pwd
+ python3 /eda/processor_ci/core/labeler_prototype.py -d /var/jenkins_home/workspace/pulpino/pulpino -c /eda/processor_ci/config.json -o /jenkins/processor_ci_utils/labels
Trying to read file: /var/jenkins_home/workspace/pulpino/pulpino/rtl/apb_mock_uart.sv
Cache-related signals in tb.sv
Results saved to /jenkins/processor_ci_utils/labels/pulpino.json
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (FPGA Build Pipeline)
[Pipeline] parallel
[Pipeline] { (Branch: colorlight_i9)
[Pipeline] { (Branch: digilent_arty_a7_100t)
[Pipeline] stage
[Pipeline] { (colorlight_i9)
[Pipeline] stage
[Pipeline] { (digilent_arty_a7_100t)
[Pipeline] lock
Trying to acquire lock on [Resource: colorlight_i9]
Resource [colorlight_i9] did not exist. Created.
Lock acquired on [Resource: colorlight_i9]
[Pipeline] {
[Pipeline] lock
Trying to acquire lock on [Resource: digilent_arty_a7_100t]
The resource [digilent_arty_a7_100t] is locked by build RISC-V #62 #62 since Apr 5, 2025, 4:18 AM.
[Resource: digilent_arty_a7_100t] is not free, waiting for execution ...
[Required resources: [digilent_arty_a7_100t]] added into queue at position 0
[Pipeline] stage
[Pipeline] { (Synthesis and PnR)
[Pipeline] dir
Running in /var/jenkins_home/workspace/pulpino/pulpino
[Pipeline] {
[Pipeline] echo
Starting synthesis for FPGA colorlight_i9.
[Pipeline] sh
+ python3 /eda/processor_ci/main.py -c /eda/processor_ci/config.json -p pulpino -b colorlight_i9
Final configuration file generated at /var/jenkins_home/workspace/pulpino/pulpino/build_colorlight_i9.tcl
Error executing Makefile.
ERROR: /var/jenkins_home/workspace/pulpino/pulpino/rtl/axi_node_intf_wrap.sv:29: Encountered unhandled type in process_port: interface_array
make: *** [/eda/processor_ci/makefiles/colorlight_i9.mk:12: colorlight_i9.json] Error 1

Traceback (most recent call last):
  File "/eda/processor_ci/main.py", line 135, in <module>
    main(
  File "/eda/processor_ci/main.py", line 82, in main
    build(build_file_path, board_name, toolchain_path)
  File "/eda/processor_ci/core/fpga.py", line 307, in build
    raise subprocess.CalledProcessError(process.returncode, 'make')
subprocess.CalledProcessError: Command 'make' returned non-zero exit status 2.
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Flash colorlight_i9)
Stage "Flash colorlight_i9" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Test colorlight_i9)
Stage "Test colorlight_i9" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Lock released on resource [Resource: colorlight_i9]
[Pipeline] // lock
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Failed in branch colorlight_i9
Lock acquired on [Resource: digilent_arty_a7_100t]
[Pipeline] {
[Pipeline] stage
[Pipeline] { (Synthesis and PnR)
[Pipeline] dir
Running in /var/jenkins_home/workspace/pulpino/pulpino
[Pipeline] {
[Pipeline] echo
Starting synthesis for FPGA digilent_arty_a7_100t.
[Pipeline] sh
+ python3 /eda/processor_ci/main.py -c /eda/processor_ci/config.json -p pulpino -b digilent_arty_a7_100t
Final configuration file generated at /var/jenkins_home/workspace/pulpino/pulpino/build_digilent_arty_a7_100t.tcl
Error executing Makefile.
ERROR: [Synth 8-9263] cannot open include file 'axi_bus.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/axi2apb_wrap.sv:11]
ERROR: [Synth 8-9263] cannot open include file 'axi_bus.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/axi_mem_if_SP_wrap.sv:11]
ERROR: [Synth 8-9263] cannot open include file 'axi_bus.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/axi_node_intf_wrap.sv:12]
ERROR: [Synth 8-9263] cannot open include file 'config.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/boot_rom_wrap.sv:12]
ERROR: [Synth 8-9263] cannot open include file 'axi_bus.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/core2axi_wrap.sv:12]
ERROR: [Synth 8-9263] cannot open include file 'axi_bus.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/core_region.sv:12]
ERROR: [Synth 8-9263] cannot open include file 'config.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/core_region.sv:13]
ERROR: [Synth 8-9263] cannot open include file 'config.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/dp_ram_wrap.sv:12]
ERROR: [Synth 8-9263] cannot open include file 'config.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/instr_ram_wrap.sv:12]
ERROR: [Synth 8-9263] cannot open include file 'apb_bus.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/periph_bus_wrap.sv:11]
ERROR: [Synth 8-9263] cannot open include file 'axi_bus.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/peripherals.sv:11]
ERROR: [Synth 8-9263] cannot open include file 'apb_bus.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/peripherals.sv:12]
ERROR: [Synth 8-9263] cannot open include file 'debug_bus.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/peripherals.sv:13]
ERROR: [Synth 8-9263] cannot open include file 'config.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/peripherals.sv:14]
ERROR: [Synth 8-9263] cannot open include file 'axi_bus.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/pulpino_top.sv:11]
ERROR: [Synth 8-9263] cannot open include file 'debug_bus.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/pulpino_top.sv:12]
ERROR: [Synth 8-9263] cannot open include file 'config.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/sp_ram_wrap.sv:11]
ERROR: [Synth 8-9263] cannot open include file 'axi_bus.sv' [/var/jenkins_home/workspace/pulpino/pulpino/rtl/axi2apb_wrap.sv:11]
ERROR: [Synth 8-439] module 'processorci_top' not found
ERROR: [Common 17-69] Command failed: Synthesis failed - please see the console or run log file for details
make: *** [/eda/processor_ci/makefiles/digilent_arty_a7_100t.mk:12: digilent_arty_a7_100t.bit] Error 1

Traceback (most recent call last):
  File "/eda/processor_ci/main.py", line 135, in <module>
    main(
  File "/eda/processor_ci/main.py", line 82, in main
    build(build_file_path, board_name, toolchain_path)
  File "/eda/processor_ci/core/fpga.py", line 307, in build
    raise subprocess.CalledProcessError(process.returncode, 'make')
subprocess.CalledProcessError: Command 'make' returned non-zero exit status 2.
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Flash digilent_arty_a7_100t)
Stage "Flash digilent_arty_a7_100t" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Test digilent_arty_a7_100t)
Stage "Test digilent_arty_a7_100t" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Lock released on resource [Resource: digilent_arty_a7_100t]
[Pipeline] // lock
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Failed in branch digilent_arty_a7_100t
[Pipeline] // parallel
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Declarative: Post Actions)
[Pipeline] junit
Recording test results
No test report files were found. Configuration error?
Error when executing always post condition:
Also:   org.jenkinsci.plugins.workflow.actions.ErrorAction$ErrorId: 4123caf0-2eb7-43b9-a612-4ce914762a2a
hudson.AbortException: No test report files were found. Configuration error?
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitParser$ParseResultCallable.invoke(JUnitParser.java:253)
	at hudson.FilePath.act(FilePath.java:1234)
	at hudson.FilePath.act(FilePath.java:1217)
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitParser.parseResult(JUnitParser.java:146)
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitResultArchiver.parse(JUnitResultArchiver.java:177)
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitResultArchiver.parseAndSummarize(JUnitResultArchiver.java:282)
	at PluginClassLoader for junit//hudson.tasks.junit.pipeline.JUnitResultsStepExecution.run(JUnitResultsStepExecution.java:62)
	at PluginClassLoader for junit//hudson.tasks.junit.pipeline.JUnitResultsStepExecution.run(JUnitResultsStepExecution.java:27)
	at PluginClassLoader for workflow-step-api//org.jenkinsci.plugins.workflow.steps.SynchronousNonBlockingStepExecution.lambda$start$0(SynchronousNonBlockingStepExecution.java:49)
	at java.base/java.util.concurrent.Executors$RunnableAdapter.call(Unknown Source)
	at java.base/java.util.concurrent.FutureTask.run(Unknown Source)
	at java.base/java.util.concurrent.ThreadPoolExecutor.runWorker(Unknown Source)
	at java.base/java.util.concurrent.ThreadPoolExecutor$Worker.run(Unknown Source)
	at java.base/java.lang.Thread.run(Unknown Source)

[Pipeline] }
[Pipeline] // stage
[Pipeline] }
[Pipeline] // node
[Pipeline] End of Pipeline
ERROR: script returned exit code 1
Finished: FAILURE