Console Output

Started by timer
[Pipeline] Start of Pipeline
[Pipeline] node
Running on Jenkins in /var/lib/jenkins/workspace/scr1
[Pipeline] {
[Pipeline] stage
[Pipeline] { (Git Clone)
[Pipeline] sh
+ rm -rf scr1
[Pipeline] sh
+ git clone --recursive https://github.com/syntacore/scr1 scr1
Cloning into 'scr1'...
Submodule 'dependencies/coremark' (https://github.com/eembc/coremark) registered for path 'dependencies/coremark'
Submodule 'dependencies/riscv-arch' (https://github.com/riscv/riscv-arch-test) registered for path 'dependencies/riscv-arch'
Submodule 'dependencies/riscv-compliance' (https://github.com/riscv/riscv-compliance) registered for path 'dependencies/riscv-compliance'
Submodule 'dependencies/riscv-tests' (https://github.com/riscv/riscv-tests) registered for path 'dependencies/riscv-tests'
Cloning into '/var/lib/jenkins/workspace/scr1/scr1/dependencies/coremark'...
Cloning into '/var/lib/jenkins/workspace/scr1/scr1/dependencies/riscv-arch'...
Cloning into '/var/lib/jenkins/workspace/scr1/scr1/dependencies/riscv-compliance'...
Cloning into '/var/lib/jenkins/workspace/scr1/scr1/dependencies/riscv-tests'...
Submodule path 'dependencies/coremark': checked out '41537ea30b0104438b4ff993e7d349af26900acf'
Submodule path 'dependencies/riscv-arch': checked out '9141cf9274b610d059199e8aa2e21f54a0bc6a6e'
Submodule path 'dependencies/riscv-compliance': checked out 'd51259b2a949be3af02e776c39e135402675ac9b'
Submodule path 'dependencies/riscv-tests': checked out '5f8a4918c6482e65c67a2b7decd5c2af3e3fe0e5'
Submodule 'env' (https://github.com/riscv/riscv-test-env.git) registered for path 'dependencies/riscv-tests/env'
Cloning into '/var/lib/jenkins/workspace/scr1/scr1/dependencies/riscv-tests/env'...
Submodule path 'dependencies/riscv-tests/env': checked out '43d3d53809085e2c8f030d72eed1bdf798bfb31a'
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Simulation)
[Pipeline] dir
Running in /var/lib/jenkins/workspace/scr1/scr1
[Pipeline] {
[Pipeline] sh
+ iverilog -o simulation.out -g2012 -s scr1_core_top -I src/includes src/core/scr1_clk_ctrl.sv src/core/scr1_core_top.sv src/core/scr1_dm.sv src/core/scr1_dmi.sv src/core/scr1_scu.sv src/core/scr1_tapc.sv src/core/scr1_tapc_shift_reg.sv src/core/scr1_tapc_synchronizer.sv src/core/pipeline/scr1_ipic.sv src/core/pipeline/scr1_pipe_csr.sv src/core/pipeline/scr1_pipe_exu.sv src/core/pipeline/scr1_pipe_hdu.sv src/core/pipeline/scr1_pipe_ialu.sv src/core/pipeline/scr1_pipe_idu.sv src/core/pipeline/scr1_pipe_ifu.sv src/core/pipeline/scr1_pipe_lsu.sv src/core/pipeline/scr1_pipe_mprf.sv src/core/pipeline/scr1_pipe_tdu.sv src/core/pipeline/scr1_pipe_top.sv src/core/pipeline/scr1_tracelog.sv src/core/primitives/scr1_cg.sv src/core/primitives/scr1_reset_cells.sv
src/includes/scr1_arch_description.svh:124: syntax error
I give up.
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (FPGA Build Pipeline)
Stage "FPGA Build Pipeline" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] parallel
[Pipeline] { (Branch: colorlight_i9)
[Pipeline] { (Branch: digilent_nexys4_ddr)
[Pipeline] stage
[Pipeline] { (colorlight_i9)
[Pipeline] stage
[Pipeline] { (digilent_nexys4_ddr)
Stage "colorlight_i9" skipped due to earlier failure(s)
[Pipeline] getContext
Stage "digilent_nexys4_ddr" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] stage
[Pipeline] { (Síntese e PnR)
[Pipeline] stage
[Pipeline] { (Síntese e PnR)
Stage "colorlight_i9" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
Stage "digilent_nexys4_ddr" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Flash colorlight_i9)
[Pipeline] stage
[Pipeline] { (Flash digilent_nexys4_ddr)
Stage "colorlight_i9" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
Stage "digilent_nexys4_ddr" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Teste colorlight_i9)
[Pipeline] stage
[Pipeline] { (Teste digilent_nexys4_ddr)
Stage "colorlight_i9" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
Stage "digilent_nexys4_ddr" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] // stage
[Pipeline] }
[Pipeline] }
[Pipeline] // stage
[Pipeline] // stage
[Pipeline] }
Failed in branch colorlight_i9
[Pipeline] }
Failed in branch digilent_nexys4_ddr
[Pipeline] // parallel
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Declarative: Post Actions)
[Pipeline] dir
Running in /var/lib/jenkins/workspace/scr1/scr1
[Pipeline] {
[Pipeline] sh
+ rm -rf LICENSE Makefile README.md dependencies docs sim src
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
[Pipeline] // node
[Pipeline] End of Pipeline
ERROR: script returned exit code 2
Finished: FAILURE