Console Output

Started by timer
[Pipeline] Start of Pipeline
[Pipeline] node
Running on Jenkins in /var/jenkins_home/workspace/rsd
[Pipeline] {
[Pipeline] stage
[Pipeline] { (Git Clone)
[Pipeline] sh
+ rm -rf *.xml
[Pipeline] sh
+ rm -rf rsd
[Pipeline] sh
+ git clone --recursive --depth=1 https://github.com/rsd-devel/rsd rsd
Cloning into 'rsd'...
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Simulation)
[Pipeline] dir
Running in /var/jenkins_home/workspace/rsd/rsd
[Pipeline] {
[Pipeline] echo
simulation not supported for System Verilog files
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Utilities)
[Pipeline] dir
Running in /var/jenkins_home/workspace/rsd/rsd
[Pipeline] {
[Pipeline] sh
+ pwd
+ python3 /eda/processor_ci/core/labeler_prototype.py -d /var/jenkins_home/workspace/rsd/rsd -c /eda/processor_ci/config -o /jenkins/processor_ci_utils/labels
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Core.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/BasicMacros.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/BasicTypes.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Controller.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/ControllerIF.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Core.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Main.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/MicroArchConf.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/ResetController.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/SynthesisMacros.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/CacheFlushManager.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/CacheFlushManagerIF.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/CacheSystemIF.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/CacheSystemTypes.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/DCache.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/DCacheIF.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/ICache.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/MemoryAccessController.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Debug/Debug.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Debug/DebugIF.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Debug/DebugTypes.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Debug/PerformanceCounter.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Debug/PerformanceCounterIF.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Decoder/DecodedBranchResolver.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Decoder/Decoder.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Decoder/MicroOp.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Decoder/OpFormat.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/ExecUnit/BitCounter.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/ExecUnit/DividerUnit.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/ExecUnit/IntALU.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/ExecUnit/MultiplierUnit.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/ExecUnit/PipelinedRefDivider.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/ExecUnit/Shifter.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/FetchUnit/Bimodal.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/FetchUnit/BranchPredictor.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/FetchUnit/FetchUnitTypes.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/FetchUnit/Gshare.sv
Trying to read file: /var/jenkins_home/workspace/rsd/rsd/Processor/Src/FloatingPointUnit/FP32DivSqrter.sv
Cache-related signals in BasicTypes.sv
Cache-related signals in ControllerIF.sv
Cache-related signals in FetchUnitTypes.sv
Cache-related signals in Bimodal.sv
Cache-related signals in BTB.sv
Cache-related signals in Gshare.sv
Cache-related signals in DividerUnit.sv
Cache-related signals in DebugTypes.sv
Cache-related signals in Scheduler.sv
Cache-related signals in WakeupLogic.sv
Cache-related signals in SchedulerTypes.sv
Cache-related signals in ReplayQueue.sv
Cache-related signals in WakeupPipelineRegister.sv
Cache-related signals in SourceCAM.sv
Possible cache file: DCacheIF.sv
Possible cache file: CacheSystemIF.sv
Possible cache file: CacheSystemTypes.sv
Cache-related signals in CacheSystemTypes.sv
Possible cache file: DCache.sv
Cache-related signals in DCache.sv
Possible cache file: ICache.sv
Cache-related signals in ICache.sv
Possible cache file: CacheFlushManagerIF.sv
Cache-related signals in MemoryAccessController.sv
Possible cache file: CacheFlushManager.sv
Cache-related signals in VerilatorHelper.sv
Cache-related signals in BypassNetwork.sv
Cache-related signals in BypassTypes.sv
Cache-related signals in BypassController.sv
Cache-related signals in RegisterFile.sv
Cache-related signals in Axi4LiteMemory.sv
Cache-related signals in MemoryMapTypes.sv
Cache-related signals in Memory.sv
Cache-related signals in Axi4LiteControlMemoryIF.sv
Cache-related signals in Axi4LiteControlRegister.sv
Cache-related signals in Axi4MemoryIF.sv
Cache-related signals in Axi4Memory.sv
Cache-related signals in Axi4LiteControlRegisterIF.sv
Cache-related signals in ActiveList.sv
Cache-related signals in PreDecodeStage.sv
Cache-related signals in DecodeStage.sv
Cache-related signals in RenameStage.sv
Cache-related signals in DispatchStage.sv
Cache-related signals in ScheduleStage.sv
Cache-related signals in PipelineTypes.sv
Cache-related signals in MemoryIssueStage.sv
Cache-related signals in MemoryTagAccessStage.sv
Cache-related signals in MemoryAccessStage.sv
Cache-related signals in MemoryRegisterWriteStage.sv
Cache-related signals in MemoryExecutionStage.sv
Cache-related signals in MemoryRegisterReadStage.sv
Cache-related signals in IntegerRegisterWriteStage.sv
Cache-related signals in IntegerExecutionStage.sv
Cache-related signals in IntegerRegisterReadStage.sv
Cache-related signals in IntegerIssueStage.sv
Cache-related signals in ComplexIntegerRegisterReadStage.sv
Cache-related signals in ComplexIntegerIssueStage.sv
Cache-related signals in ComplexIntegerExecutionStage.sv
Cache-related signals in ComplexIntegerRegisterWriteStage.sv
Cache-related signals in FPExecutionStage.sv
Cache-related signals in FPIssueStage.sv
Cache-related signals in FPRegisterReadStage.sv
Cache-related signals in FPRegisterWriteStage.sv
Cache-related signals in NextPCStage.sv
Cache-related signals in FetchStage.sv
Cache-related signals in MicroOp.sv
Cache-related signals in Decoder.sv
Cache-related signals in CSR_UnitTypes.sv
Cache-related signals in Dumper.sv
Cache-related signals in TestSourceCAM.sv
Possible cache file: TestICacheSystemTop.sv
Possible cache file: TestICacheSystem.sv
Cache-related signals in TestMemory.sv
Possible cache file: TestDCacheTop.sv
Possible cache file: TestDCache.sv
Possible cache file: TestICacheFiller.sv
Cache-related signals in TestICacheFiller.sv
Possible cache file: TestICacheFillerTop.sv
Possible cache file: TestCacheSystem.sv
Possible cache file: TestCacheSystemTop.sv
Possible cache file: TestICache.sv
Possible cache file: TestICacheTop.sv
Possible cache file: TestDCacheFillerTop.sv
Possible cache file: TestDCacheFiller.sv
Cache-related signals in TestDCacheFiller.sv
Cache-related signals in LoadQueue.sv
Cache-related signals in StoreQueue.sv
Cache-related signals in StoreCommitter.sv
Cache-related signals in Queue.sv
Cache-related signals in Picker.sv
Results saved to /jenkins/processor_ci_utils/labels/rsd.json
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (FPGA Build Pipeline)
[Pipeline] parallel
[Pipeline] { (Branch: digilent_arty_a7_100t)
[Pipeline] stage
[Pipeline] { (digilent_arty_a7_100t)
[Pipeline] lock
Trying to acquire lock on [Resource: digilent_arty_a7_100t]
Resource [digilent_arty_a7_100t] did not exist. Created.
Lock acquired on [Resource: digilent_arty_a7_100t]
[Pipeline] {
[Pipeline] stage
[Pipeline] { (Synthesis and PnR)
[Pipeline] dir
Running in /var/jenkins_home/workspace/rsd/rsd
[Pipeline] {
[Pipeline] echo
Starting synthesis for FPGA digilent_arty_a7_100t.
[Pipeline] sh
+ python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p rsd -b digilent_arty_a7_100t
[LOCK] Criado: run.lock
File 'processor_ci_defines.vh' generated for board: 'digilent_arty_a7_100t'.
Final configuration file generated at /var/jenkins_home/workspace/rsd/rsd/build_digilent_arty_a7_100t.tcl
[LOCK] Removido: run.lock
Error executing Makefile.
ERROR: [Synth 8-9263] cannot open include file 'BasicMacros.sv' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/CacheFlushManager.sv:9]
ERROR: [Synth 8-9263] cannot open include file 'BasicMacros.sv' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/DCache.sv:24]
ERROR: [Synth 8-9263] cannot open include file 'BasicMacros.sv' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/ICache.sv:10]
ERROR: [Synth 8-9263] cannot open include file 'BasicMacros.sv' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/MemoryAccessController.sv:12]
ERROR: [Synth 8-9263] cannot open include file 'BasicMacros.sv' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/FloatingPointUnit/FPDivSqrtUnit.sv:4]
ERROR: [Synth 8-9263] cannot open include file 'BasicMacros.sv' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/FloatingPointUnit/FPDivSqrtUnitIF.sv:9]
ERROR: [Synth 8-9263] cannot open include file 'BasicMacros.sv' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/IO/IO_Unit.sv:9]
ERROR: [Synth 8-9263] cannot open include file 'BasicMacros.sv' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/LoadStoreUnit/LoadQueue.sv:9]
ERROR: [Synth 8-9263] cannot open include file 'BasicMacros.sv' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/LoadStoreUnit/LoadStoreUnit.sv:9]
ERROR: [Synth 8-9263] cannot open include file 'BasicMacros.sv' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/LoadStoreUnit/StoreCommitter.sv:9]
ERROR: [Synth 8-9263] cannot open include file 'BasicMacros.sv' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/LoadStoreUnit/StoreQueue.sv:9]
ERROR: [Synth 8-9263] cannot open include file 'SysDeps/XilinxMacros.vh' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/Axi4LiteControlRegister.sv:8]
ERROR: [Synth 8-9263] cannot open include file 'SysDeps/XilinxMacros.vh' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/Axi4LiteControlRegisterIF.sv:9]
ERROR: [Synth 8-9263] cannot open include file 'BasicMacros.sv' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/Axi4Memory.sv:8]
ERROR: [Synth 8-9263] cannot open include file 'SysDeps/XilinxMacros.vh' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/Axi4Memory.sv:9]
ERROR: [Synth 8-9263] cannot open include file 'SysDeps/XilinxMacros.vh' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/Axi4MemoryIF.sv:9]
ERROR: [Synth 8-9263] cannot open include file 'SysDeps/XilinxMacros.vh' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/ControlQueue.sv:9]
ERROR: [Synth 8-9263] cannot open include file 'BasicMacros.sv' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/Memory.sv:9]
ERROR: [Synth 8-9263] cannot open include file 'BasicMacros.sv' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/MemoryLatencySimulator.sv:5]
ERROR: [Synth 8-9263] cannot open include file 'SysDeps/XilinxMacros.vh' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/MemoryTypes.sv:4]
ERROR: [Synth 8-10157] use of undefined macro 'MEMORY_AXI4_READ_ID_WIDTH' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/MemoryTypes.sv:60]
ERROR: [Synth 8-10157] use of undefined macro 'MEMORY_AXI4_ADDR_BIT_SIZE' [/var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/MemoryTypes.sv:61]
ERROR: [Synth 8-7136] In the module 'Controller' declared at '/var/jenkins_home/workspace/rsd/rsd/Processor/Src/Controller.sv:9', parameter 'CLK_FREQ' used as named parameter override, does not exist [/eda/processor_ci/rtl/rsd.sv:58]
ERROR: [Synth 8-6156] failed synthesizing module 'processorci_top' [/eda/processor_ci/rtl/rsd.sv:5]
ERROR: [Common 17-69] Command failed: Synthesis failed - please see the console or run log file for details
make: *** [/eda/processor_ci/makefiles/digilent_arty_a7_100t.mk:12: digilent_arty_a7_100t.bit] Error 1

Traceback (most recent call last):
  File "/eda/processor_ci/main.py", line 142, in <module>
    main(
  File "/eda/processor_ci/main.py", line 89, in main
    build(build_file_path, board_name, toolchain_path)
  File "/eda/processor_ci/core/fpga.py", line 296, in build
    raise subprocess.CalledProcessError(process.returncode, 'make')
subprocess.CalledProcessError: Command 'make' returned non-zero exit status 2.
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Flash digilent_arty_a7_100t)
Stage "Flash digilent_arty_a7_100t" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Test digilent_arty_a7_100t)
Stage "Test digilent_arty_a7_100t" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Lock released on resource [Resource: digilent_arty_a7_100t]
[Pipeline] // lock
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Failed in branch digilent_arty_a7_100t
[Pipeline] // parallel
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Declarative: Post Actions)
[Pipeline] junit
Recording test results
[Checks API] No suitable checks publisher found.
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
[Pipeline] // node
[Pipeline] End of Pipeline
ERROR: script returned exit code 1
Finished: FAILURE