Console Output

+ /eda/oss-cad-suite/bin/iverilog -o simulation.out -g2005 -s CPU cpu/alu.v cpu/comp.v cpu/cpu.v cpu/instruction_decoder.v cpu/program_counter.v cpu/register_bank.v
cpu/register_bank.v:22: error: Unable to bind wire/reg/memory `i' in `CPU.registers'
cpu/register_bank.v:25:      : A symbol with that name was declared here. Check for declaration after use.
cpu/register_bank.v:22: error: Could not find variable ``i'' in ``CPU.registers''
cpu/register_bank.v:25:      : A symbol with that name was declared here. Check for declaration after use.
cpu/register_bank.v:22: error: Unable to bind wire/reg/memory `i' in `CPU.registers'
cpu/register_bank.v:25:      : A symbol with that name was declared here. Check for declaration after use.
cpu/instruction_decoder.v:92: error: Unable to bind wire/reg/memory `funct3['sd2]' in `CPU.ins'
cpu/instruction_decoder.v:106:      : A symbol with that name was declared here. Check for declaration after use.
cpu/instruction_decoder.v:92: error: Unable to elaborate r-value: ((funct3['sd2])==('sd1))?({27'd0, immCsr}):(regOutA)
cpu/instruction_decoder.v:96: error: Unable to bind wire/reg/memory `funct3['sd1:'sd0]' in `CPU.ins'
cpu/instruction_decoder.v:106:      : A symbol with that name was declared here. Check for declaration after use.
cpu/instruction_decoder.v:96: error: Unable to elaborate r-value: funct3['sd1:'sd0]
7 error(s) during elaboration.