Console Output

Started by timer
[Pipeline] Start of Pipeline
[Pipeline] node
Running on Jenkins in /var/jenkins_home/workspace/pulpino
[Pipeline] {
[Pipeline] stage
[Pipeline] { (Git Clone)
[Pipeline] sh
+ rm -rf pulpino
[Pipeline] sh
+ git clone --recursive --depth=1 https://github.com/pulp-platform/pulpino pulpino
Cloning into 'pulpino'...
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Simulation)
[Pipeline] dir
Running in /var/jenkins_home/workspace/pulpino/pulpino
[Pipeline] {
[Pipeline] sh
+ /eda/oss-cad-suite/bin/iverilog -o simulation.out -g2005 -s -I rtl/includes/ rtl/apb_mock_uart.sv rtl/axi2apb_wrap.sv rtl/axi_mem_if_SP_wrap.sv rtl/axi_node_intf_wrap.sv rtl/axi_slice_wrap.sv rtl/axi_spi_slave_wrap.sv rtl/boot_code.sv rtl/boot_rom_wrap.sv rtl/clk_rst_gen.sv rtl/core2axi_wrap.sv rtl/core_region.sv rtl/dp_ram_wrap.sv rtl/instr_ram_wrap.sv rtl/periph_bus_wrap.sv rtl/peripherals.sv rtl/pulpino_top.sv rtl/ram_mux.sv rtl/random_stalls.sv rtl/sp_ram_wrap.sv rtl/components/cluster_clock_gating.sv rtl/components/cluster_clock_inverter.sv rtl/components/cluster_clock_mux2.sv rtl/components/dp_ram.sv rtl/components/generic_fifo.sv rtl/components/pulp_clock_gating.sv rtl/components/pulp_clock_inverter.sv rtl/components/pulp_clock_mux2.sv rtl/components/rstgen.sv rtl/components/sp_ram.sv rtl/includes/apb_bus.sv rtl/includes/apu_defines.sv rtl/includes/axi_bus.sv rtl/includes/config.sv rtl/includes/debug_bus.sv
rtl/axi2apb_wrap.sv:12: Include file axi_bus.sv not found
rtl/apb_mock_uart.sv:51: syntax error
rtl/apb_mock_uart.sv:50: error: Invalid module instantiation
rtl/apb_mock_uart.sv:56: syntax error
rtl/apb_mock_uart.sv:56: error: Invalid module instantiation
rtl/apb_mock_uart.sv:58: syntax error
rtl/apb_mock_uart.sv:58: error: Invalid module instantiation
rtl/apb_mock_uart.sv:64: error: Invalid module item.
rtl/apb_mock_uart.sv:68: syntax error
rtl/apb_mock_uart.sv:68: error: Invalid module instantiation
rtl/apb_mock_uart.sv:77: error: Invalid module item.
rtl/apb_mock_uart.sv:78: syntax error
rtl/apb_mock_uart.sv:81: error: Invalid module item.
rtl/apb_mock_uart.sv:89: syntax error
rtl/apb_mock_uart.sv:94: error: Invalid module item.
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Utilities)
Stage "Utilities" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (FPGA Build Pipeline)
Stage "FPGA Build Pipeline" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] parallel
[Pipeline] { (Branch: colorlight_i9)
[Pipeline] { (Branch: digilent_arty_a7_100t)
[Pipeline] stage
[Pipeline] { (colorlight_i9)
[Pipeline] stage
[Pipeline] { (digilent_arty_a7_100t)
Stage "colorlight_i9" skipped due to earlier failure(s)
[Pipeline] getContext
Stage "digilent_arty_a7_100t" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] stage
[Pipeline] { (Synthesis and PnR)
[Pipeline] stage
[Pipeline] { (Synthesis and PnR)
Stage "colorlight_i9" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
Stage "digilent_arty_a7_100t" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Flash colorlight_i9)
[Pipeline] stage
[Pipeline] { (Flash digilent_arty_a7_100t)
Stage "colorlight_i9" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
Stage "digilent_arty_a7_100t" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Test colorlight_i9)
[Pipeline] stage
[Pipeline] { (Test digilent_arty_a7_100t)
Stage "colorlight_i9" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
Stage "digilent_arty_a7_100t" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] // stage
[Pipeline] }
[Pipeline] }
[Pipeline] // stage
[Pipeline] // stage
[Pipeline] }
Failed in branch colorlight_i9
[Pipeline] }
Failed in branch digilent_arty_a7_100t
[Pipeline] // parallel
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Declarative: Post Actions)
[Pipeline] junit
Recording test results
No test report files were found. Configuration error?
Error when executing always post condition:
Also:   org.jenkinsci.plugins.workflow.actions.ErrorAction$ErrorId: c2a40ed4-fb28-4525-882c-1641027d2e07
hudson.AbortException: No test report files were found. Configuration error?
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitParser$ParseResultCallable.invoke(JUnitParser.java:253)
	at hudson.FilePath.act(FilePath.java:1234)
	at hudson.FilePath.act(FilePath.java:1217)
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitParser.parseResult(JUnitParser.java:146)
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitResultArchiver.parse(JUnitResultArchiver.java:177)
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitResultArchiver.parseAndSummarize(JUnitResultArchiver.java:282)
	at PluginClassLoader for junit//hudson.tasks.junit.pipeline.JUnitResultsStepExecution.run(JUnitResultsStepExecution.java:62)
	at PluginClassLoader for junit//hudson.tasks.junit.pipeline.JUnitResultsStepExecution.run(JUnitResultsStepExecution.java:27)
	at PluginClassLoader for workflow-step-api//org.jenkinsci.plugins.workflow.steps.SynchronousNonBlockingStepExecution.lambda$start$0(SynchronousNonBlockingStepExecution.java:49)
	at java.base/java.util.concurrent.Executors$RunnableAdapter.call(Unknown Source)
	at java.base/java.util.concurrent.FutureTask.run(Unknown Source)
	at java.base/java.util.concurrent.ThreadPoolExecutor.runWorker(Unknown Source)
	at java.base/java.util.concurrent.ThreadPoolExecutor$Worker.run(Unknown Source)
	at java.base/java.lang.Thread.run(Unknown Source)

[Pipeline] }
[Pipeline] // stage
[Pipeline] }
[Pipeline] // node
[Pipeline] End of Pipeline
ERROR: script returned exit code 14
Finished: FAILURE