Console Output

+ /eda/oss-cad-suite/bin/iverilog -o simulation.out -g2005 -s mriscvcore mriscvcore/mriscvcore.v mriscvcore/ALU/ALU.v mriscvcore/DECO_INSTR/DECO_INSTR.v mriscvcore/FSM/FSM.v mriscvcore/IRQ/IRQ.v mriscvcore/MEMORY_INTERFACE/MEMORY_INTERFACE.v mriscvcore/MULT/MULT.v mriscvcore/REG_FILE/REG_FILE.v mriscvcore/UTILITIES/UTILITY.v
mriscvcore/DECO_INSTR/DECO_INSTR.v:112: warning: Extra digits given for sized binary constant.