| .git |
| .Xil |
| board |
| mriscv_apb |
| mriscv_axi |
| mriscvcore |
| .gitignore | May 11, 2025, 4:54:05 AM | 537 B | |
| .gitmodules | May 11, 2025, 4:54:05 AM | 95 B | |
| build_digilent_arty_a7_100t.tcl | May 11, 2025, 4:54:13 AM | 2.84 KiB | |
| clockInfo.txt | May 11, 2025, 4:56:32 AM | 375 B | |
| demo1.pdf | May 11, 2025, 4:54:06 AM | 571.17 KiB | |
| digilent_arty_a7_100t.bit | May 11, 2025, 4:58:39 AM | 3.65 MiB | |
| digilent_arty_a7_clock_utilization.rpt | May 11, 2025, 4:56:46 AM | 16.56 KiB | |
| digilent_arty_a7_control_sets.rpt | May 11, 2025, 4:56:45 AM | 12.48 KiB | |
| digilent_arty_a7_drc.rpt | May 11, 2025, 4:58:10 AM | 2.36 KiB | |
| digilent_arty_a7_io.rpt | May 11, 2025, 4:56:45 AM | 96.82 KiB | |
| digilent_arty_a7_power.rpt | May 11, 2025, 4:58:12 AM | 8.55 KiB | |
| digilent_arty_a7_route_status.rpt | May 11, 2025, 4:58:08 AM | 651 B | |
| digilent_arty_a7_timing.rpt | May 11, 2025, 4:58:10 AM | 18.47 KiB | |
| digilent_arty_a7_utilization_hierarchical_place.rpt | May 11, 2025, 4:56:45 AM | 3.09 KiB | |
| digilent_arty_a7_utilization_place.rpt | May 11, 2025, 4:56:45 AM | 10.57 KiB | |
| fully-synthesized-trng.pdf | May 11, 2025, 4:54:06 AM | 1.02 MiB | |
| LICENSE | May 11, 2025, 4:54:05 AM | 2.43 KiB | |
| mriscv.jpg | May 11, 2025, 4:54:06 AM | 44.89 KiB | |
| mriscv.pdf | May 11, 2025, 4:54:06 AM | 3.79 MiB | |
| PID4063257.pdf | May 11, 2025, 4:54:05 AM | 297.13 KiB | |
| processor_ci_defines.vh | May 11, 2025, 4:54:13 AM | 300 B | |
| README.md | May 11, 2025, 4:54:05 AM | 2.12 KiB | |
| simulation.out | May 11, 2025, 4:54:08 AM | 173.59 KiB | |
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