Started by timer [Pipeline] Start of Pipeline [Pipeline] node Running on Jenkins in /var/jenkins_home/workspace/mor1kx [Pipeline] { [Pipeline] stage [Pipeline] { (Git Clone) [Pipeline] sh + rm -rf mor1kx [Pipeline] sh + git clone --recursive --depth=1 https://github.com/openrisc/mor1kx mor1kx Cloning into 'mor1kx'... [Pipeline] } [Pipeline] // stage [Pipeline] stage [Pipeline] { (Simulation) [Pipeline] dir Running in /var/jenkins_home/workspace/mor1kx/mor1kx [Pipeline] { [Pipeline] sh + /eda/oss-cad-suite/bin/iverilog -o simulation.out -g2005 -s mor1kx -I rtl/verilog rtl/verilog/mor1kx-defines.v rtl/verilog/mor1kx-sprs.v rtl/verilog/mor1kx.v rtl/verilog/mor1kx_branch_prediction.v rtl/verilog/mor1kx_branch_predictor_gshare.v rtl/verilog/mor1kx_branch_predictor_saturation_counter.v rtl/verilog/mor1kx_branch_predictor_simple.v rtl/verilog/mor1kx_bus_if_wb32.v rtl/verilog/mor1kx_cache_lru.v rtl/verilog/mor1kx_cfgrs.v rtl/verilog/mor1kx_cpu.v rtl/verilog/mor1kx_cpu_cappuccino.v rtl/verilog/mor1kx_cpu_espresso.v rtl/verilog/mor1kx_cpu_prontoespresso.v rtl/verilog/mor1kx_ctrl_cappuccino.v rtl/verilog/mor1kx_ctrl_espresso.v rtl/verilog/mor1kx_ctrl_prontoespresso.v rtl/verilog/mor1kx_dcache.v rtl/verilog/mor1kx_decode.v rtl/verilog/mor1kx_decode_execute_cappuccino.v rtl/verilog/mor1kx_dmmu.v rtl/verilog/mor1kx_execute_alu.v rtl/verilog/mor1kx_execute_ctrl_cappuccino.v rtl/verilog/mor1kx_fetch_cappuccino.v rtl/verilog/mor1kx_fetch_espresso.v rtl/verilog/mor1kx_fetch_prontoespresso.v rtl/verilog/mor1kx_fetch_tcm_prontoespresso.v rtl/verilog/mor1kx_icache.v rtl/verilog/mor1kx_immu.v rtl/verilog/mor1kx_lsu_cappuccino.v rtl/verilog/mor1kx_lsu_espresso.v rtl/verilog/mor1kx_pcu.v rtl/verilog/mor1kx_pic.v rtl/verilog/mor1kx_rf_cappuccino.v rtl/verilog/mor1kx_rf_espresso.v rtl/verilog/mor1kx_simple_dpram_sclk.v rtl/verilog/mor1kx_store_buffer.v rtl/verilog/mor1kx_ticktimer.v rtl/verilog/mor1kx_true_dpram_sclk.v rtl/verilog/mor1kx_wb_mux_cappuccino.v rtl/verilog/mor1kx_wb_mux_espresso.v rtl/verilog/pfpu32/pfpu32_addsub.v rtl/verilog/pfpu32/pfpu32_cmp.v rtl/verilog/pfpu32/pfpu32_f2i.v rtl/verilog/pfpu32/pfpu32_i2f.v rtl/verilog/pfpu32/pfpu32_muldiv.v rtl/verilog/pfpu32/pfpu32_rnd.v rtl/verilog/pfpu32/pfpu32_top.v rtl/verilog/mor1kx_execute_alu.v:737: warning: @* found no sensitivities so it will never trigger. [Pipeline] } [Pipeline] // dir [Pipeline] } [Pipeline] // stage [Pipeline] stage [Pipeline] { (Utilities) [Pipeline] dir Running in /var/jenkins_home/workspace/mor1kx/mor1kx [Pipeline] { [Pipeline] sh + pwd + python3 /eda/processor_ci/core/labeler_prototype.py -d /var/jenkins_home/workspace/mor1kx/mor1kx -c /eda/processor_ci/config.json -o /eda/processor_ci_utils/labels.json Trying to read file: /var/jenkins_home/workspace/mor1kx/mor1kx/rtl/verilog/mor1kx-defines.v Trying to read file: /var/jenkins_home/workspace/mor1kx/mor1kx/rtl/verilog/mor1kx-defines.v Trying to read file: /var/jenkins_home/workspace/mor1kx/mor1kx/rtl/verilog/mor1kx-sprs.v Trying to read file: /var/jenkins_home/workspace/mor1kx/mor1kx/rtl/verilog/mor1kx.v Cache-related signals in mor1kx_decode_execute_cappuccino.v Cache-related signals in mor1kx_store_buffer.v Possible cache file: mor1kx_dcache.v Cache-related signals in mor1kx_dcache.v Possible cache file: mor1kx_cache_lru.v Cache-related signals in mor1kx_cache_lru.v Cache-related signals in mor1kx_ctrl_cappuccino.v Cache-related signals in mor1kx_fetch_cappuccino.v Cache-related signals in mor1kx_branch_prediction.v Cache-related signals in mor1kx-defines.v Cache-related signals in mor1kx_fetch_prontoespresso.v Cache-related signals in mor1kx_dmmu.v Cache-related signals in mor1kx_decode.v Cache-related signals in mor1kx_fetch_espresso.v Cache-related signals in mor1kx_execute_ctrl_cappuccino.v Possible cache file: mor1kx_icache.v Cache-related signals in mor1kx_icache.v Cache-related signals in mor1kx_lsu_cappuccino.v Cache-related signals in mor1kx_cpu.v Cache-related signals in mor1kx_immu.v Cache-related signals in pfpu32_top.v Cache-related signals in fwb_master.v Traceback (most recent call last): File "/eda/processor_ci/core/labeler_prototype.py", line 430, in <module> main(dir_to_search, config_json, output_folder) File "/eda/processor_ci/core/labeler_prototype.py", line 399, in main generate_labels_file( File "/eda/processor_ci/core/labeler_prototype.py", line 303, in generate_labels_file os.makedirs(output_dir, exist_ok=True) File "<frozen os>", line 225, in makedirs OSError: [Errno 30] Read-only file system: '/eda/processor_ci_utils/labels.json' [Pipeline] } [Pipeline] // dir [Pipeline] } [Pipeline] // stage [Pipeline] stage [Pipeline] { (FPGA Build Pipeline) Stage "FPGA Build Pipeline" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] parallel [Pipeline] { (Branch: colorlight_i9) [Pipeline] { (Branch: digilent_arty_a7_100t) [Pipeline] stage [Pipeline] { (colorlight_i9) [Pipeline] stage [Pipeline] { (digilent_arty_a7_100t) Stage "colorlight_i9" skipped due to earlier failure(s) [Pipeline] getContext Stage "digilent_arty_a7_100t" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] stage [Pipeline] { (Synthesis and PnR) [Pipeline] stage [Pipeline] { (Synthesis and PnR) Stage "colorlight_i9" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] } Stage "digilent_arty_a7_100t" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] } [Pipeline] // stage [Pipeline] // stage [Pipeline] stage [Pipeline] { (Flash colorlight_i9) [Pipeline] stage [Pipeline] { (Flash digilent_arty_a7_100t) Stage "colorlight_i9" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] } Stage "digilent_arty_a7_100t" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] } [Pipeline] // stage [Pipeline] // stage [Pipeline] stage [Pipeline] { (Test colorlight_i9) [Pipeline] stage [Pipeline] { (Test digilent_arty_a7_100t) Stage "colorlight_i9" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] } Stage "digilent_arty_a7_100t" skipped due to earlier failure(s) [Pipeline] getContext [Pipeline] } [Pipeline] // stage [Pipeline] // stage [Pipeline] } [Pipeline] } [Pipeline] // stage [Pipeline] // stage [Pipeline] } Failed in branch colorlight_i9 [Pipeline] } Failed in branch digilent_arty_a7_100t [Pipeline] // parallel [Pipeline] } [Pipeline] // stage [Pipeline] stage [Pipeline] { (Declarative: Post Actions) [Pipeline] junit Recording test results No test report files were found. Configuration error? Error when executing always post condition: Also: org.jenkinsci.plugins.workflow.actions.ErrorAction$ErrorId: b7619187-e0ec-4ee6-8838-f2e0a790632e hudson.AbortException: No test report files were found. Configuration error? at PluginClassLoader for junit//hudson.tasks.junit.JUnitParser$ParseResultCallable.invoke(JUnitParser.java:253) at hudson.FilePath.act(FilePath.java:1234) at hudson.FilePath.act(FilePath.java:1217) at PluginClassLoader for junit//hudson.tasks.junit.JUnitParser.parseResult(JUnitParser.java:146) at PluginClassLoader for junit//hudson.tasks.junit.JUnitResultArchiver.parse(JUnitResultArchiver.java:177) at PluginClassLoader for junit//hudson.tasks.junit.JUnitResultArchiver.parseAndSummarize(JUnitResultArchiver.java:282) at PluginClassLoader for junit//hudson.tasks.junit.pipeline.JUnitResultsStepExecution.run(JUnitResultsStepExecution.java:62) at PluginClassLoader for junit//hudson.tasks.junit.pipeline.JUnitResultsStepExecution.run(JUnitResultsStepExecution.java:27) at PluginClassLoader for workflow-step-api//org.jenkinsci.plugins.workflow.steps.SynchronousNonBlockingStepExecution.lambda$start$0(SynchronousNonBlockingStepExecution.java:49) at java.base/java.util.concurrent.Executors$RunnableAdapter.call(Unknown Source) at java.base/java.util.concurrent.FutureTask.run(Unknown Source) at java.base/java.util.concurrent.ThreadPoolExecutor.runWorker(Unknown Source) at java.base/java.util.concurrent.ThreadPoolExecutor$Worker.run(Unknown Source) at java.base/java.lang.Thread.run(Unknown Source) [Pipeline] } [Pipeline] // stage [Pipeline] } [Pipeline] // node [Pipeline] End of Pipeline ERROR: script returned exit code 1 Finished: FAILURE