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+ python3 /eda/processor-ci/main.py -c /eda/processor-ci/config.json -p e203_hbirdv2 -b digilent_nexys4_ddr
Arquivo de configura����o final gerado em /var/lib/jenkins/workspace/e203_hbirdv2/e203_hbirdv2/build_digilent_nexys4_ddr.tcl
Erro ao executar o Makefile.
ERROR: [Synth 8-9263] cannot open include file 'e203_defines.v' [/var/lib/jenkins/workspace/e203_hbirdv2/e203_hbirdv2/rtl/e203/subsys/e203_subsys_clint.v:28]
ERROR: [Synth 8-9263] cannot open include file 'e203_defines.v' [/var/lib/jenkins/workspace/e203_hbirdv2/e203_hbirdv2/rtl/e203/subsys/e203_subsys_gfcm.v:28]
ERROR: [Synth 8-9263] cannot open include file 'e203_defines.v' [/var/lib/jenkins/workspace/e203_hbirdv2/e203_hbirdv2/rtl/e203/subsys/e203_subsys_hclkgen.v:28]
ERROR: [Synth 8-9263] cannot open include file 'e203_defines.v' [/var/lib/jenkins/workspace/e203_hbirdv2/e203_hbirdv2/rtl/e203/subsys/e203_subsys_hclkgen_rstsync.v:27]
ERROR: [Synth 8-9263] cannot open include file 'e203_defines.v' [/var/lib/jenkins/workspace/e203_hbirdv2/e203_hbirdv2/rtl/e203/subsys/e203_subsys_main.v:29]
ERROR: [Synth 8-9263] cannot open include file 'e203_defines.v' [/var/lib/jenkins/workspace/e203_hbirdv2/e203_hbirdv2/rtl/e203/subsys/e203_subsys_mems.v:29]
ERROR: [Synth 8-9263] cannot open include file 'e203_defines.v' [/var/lib/jenkins/workspace/e203_hbirdv2/e203_hbirdv2/rtl/e203/subsys/e203_subsys_nice_core.v:25]
ERROR: [Synth 8-9263] cannot open include file 'e203_defines.v' [/var/lib/jenkins/workspace/e203_hbirdv2/e203_hbirdv2/rtl/e203/subsys/e203_subsys_perips.v:28]
ERROR: [Synth 8-9263] cannot open include file 'e203_defines.v' [/var/lib/jenkins/workspace/e203_hbirdv2/e203_hbirdv2/rtl/e203/subsys/e203_subsys_plic.v:29]
ERROR: [Synth 8-9263] cannot open include file 'e203_defines.v' [/var/lib/jenkins/workspace/e203_hbirdv2/e203_hbirdv2/rtl/e203/subsys/e203_subsys_pll.v:28]
ERROR: [Synth 8-9263] cannot open include file 'e203_defines.v' [/var/lib/jenkins/workspace/e203_hbirdv2/e203_hbirdv2/rtl/e203/subsys/e203_subsys_pllclkdiv.v:28]
ERROR: [Synth 8-9263] cannot open include file 'e203_defines.v' [/var/lib/jenkins/workspace/e203_hbirdv2/e203_hbirdv2/rtl/e203/subsys/e203_subsys_top.v:29]
ERROR: [Synth 8-9263] cannot open include file 'e203_defines.v' [/var/lib/jenkins/workspace/e203_hbirdv2/e203_hbirdv2/rtl/e203/subsys/e203_subsys_clint.v:28]
ERROR: [Synth 8-439] module 'Controller' not found [/eda/processor-ci/rtl/e203_hbirdv2.v:48]
ERROR: [Synth 8-6156] failed synthesizing module 'processorci_top' [/eda/processor-ci/rtl/e203_hbirdv2.v:1]
ERROR: [Common 17-69] Command failed: Synthesis failed - please see the console or run log file for details
make: *** [/eda/processor-ci/makefiles/digilent_nexys4_ddr.mk:12: digilent_nexys4_ddr.bit] Error 1

Traceback (most recent call last):
  File "/eda/processor-ci/main.py", line 79, in <module>
    main(
  File "/eda/processor-ci/main.py", line 26, in main
    build(build_file_path, board_name, toolchain_path)
  File "/eda/processor-ci/core/fpga.py", line 113, in build
    raise subprocess.CalledProcessError(process.returncode, "make")
subprocess.CalledProcessError: Command 'make' returned non-zero exit status 2.