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Start of Pipeline - (1 min 30 sec in block)
node - (1 min 30 sec in block)
node block - (1 min 29 sec in block)
stage - (8 sec in block)Git Clone
stage block (Git Clone) - (7.5 sec in block)
sh - (0.46 sec in self)rm -rf e203_hbirdv2
sh - (6.8 sec in self)git clone --recursive https://github.com/riscv-mcu/e203_hbirdv2 e203_hbirdv2
stage - (1.9 sec in block)Simulation
stage block (Simulation) - (1.5 sec in block)
dir - (1.1 sec in block)e203_hbirdv2
dir block - (0.86 sec in block)
sh - (0.62 sec in self)
stage - (1 min 17 sec in block)FPGA Build Pipeline
stage block (FPGA Build Pipeline) - (1 min 16 sec in block)
parallel - (1 min 16 sec in block)
parallel block (Branch: colorlight_i9) - (56 ms in block)
stage - (8.2 sec in block)colorlight_i9
stage block (colorlight_i9) - (7.9 sec in block)
lock - (7.1 sec in block)colorlight_i9
lock block - (6.4 sec in block)
stage - (3.9 sec in block)Síntese e PnR
stage block (Síntese e PnR) - (3.3 sec in block)
dir - (2.4 sec in block)e203_hbirdv2
dir block - (2.1 sec in block)
echo - (0.29 sec in self)Iniciando síntese para FPGA colorlight_i9.
sh - (1.3 sec in self)python3 /eda/processor-ci/main.py -c /eda/processor-ci/config.json -p e203_hbirdv2 -b colorlight_i9
stage - (0.97 sec in block)Flash colorlight_i9
stage block (Flash colorlight_i9) - (0.38 sec in block)
getContext - (0.16 sec in self)
stage - (0.68 sec in block)Teste colorlight_i9
stage block (Teste colorlight_i9) - (0.37 sec in block)
getContext - (0.15 sec in self)
parallel block (Branch: digilent_nexys4_ddr) - (1 min 15 sec in block)
stage - (1 min 15 sec in block)digilent_nexys4_ddr
stage block (digilent_nexys4_ddr) - (1 min 14 sec in block)
lock - (1 min 13 sec in block)digilent_nexys4_ddr
lock block - (1 min 13 sec in block)
stage - (1 min 10 sec in block)Síntese e PnR
stage block (Síntese e PnR) - (1 min 9 sec in block)
dir - (1 min 9 sec in block)e203_hbirdv2
dir block - (1 min 8 sec in block)
echo - (0.16 sec in self)Iniciando síntese para FPGA digilent_nexys4_ddr.
sh - (1 min 7 sec in self)python3 /eda/processor-ci/main.py -c /eda/processor-ci/config.json -p e203_hbirdv2 -b digilent_nexys4_ddr
stage - (1 sec in block)Flash digilent_nexys4_ddr
stage block (Flash digilent_nexys4_ddr) - (0.46 sec in block)
getContext - (0.2 sec in self)
stage - (0.71 sec in block)Teste digilent_nexys4_ddr
stage block (Teste digilent_nexys4_ddr) - (0.38 sec in block)
getContext - (0.16 sec in self)
stage - (1.6 sec in block)Declarative: Post Actions
stage block (Declarative: Post Actions) - (1.4 sec in block)
dir - (0.86 sec in block)e203_hbirdv2
dir block - (0.61 sec in block)
sh - (0.39 sec in self)rm -rf *