Step | Arguments | Status | ||
---|---|---|---|---|
Start of Pipeline - (13 sec in block) | ||||
node - (12 sec in block) | ||||
node block - (12 sec in block) | ||||
stage - (2.5 sec in block) | Git Clone | |||
stage block (Git Clone) - (2 sec in block) | ||||
sh - (0.45 sec in self) | rm -rf *.xml | |||
sh - (0.46 sec in self) | rm -rf biriscv | |||
sh - (0.92 sec in self) | git clone --recursive --depth=1 https://github.com/ultraembedded/biriscv biriscv | |||
stage - (2 sec in block) | Simulation | |||
stage block (Simulation) - (1.4 sec in block) | ||||
dir - (0.99 sec in block) | biriscv | |||
dir block - (0.67 sec in block) | ||||
sh - (0.48 sec in self) | /eda/oss-cad-suite/bin/iverilog -o simulation.out -g2005 -s riscv_top -I src/core -I src/dcache -I src/icache src/core/biriscv_alu.v src/core/biriscv_csr.v src/core/biriscv_csr_regfile.v src/core/biriscv_decode.v src/core/biriscv_decoder.v src/core/biriscv_defs.v src/core/biriscv_divider.v src/core/biriscv_exec.v src/core/biriscv_fetch.v src/core/biriscv_frontend.v src/core/biriscv_issue.v src/core/biriscv_lsu.v src/core/biriscv_mmu.v src/core/biriscv_multiplier.v src/core/biriscv_npc.v src/core/biriscv_pipe_ctrl.v src/core/biriscv_regfile.v src/core/biriscv_trace_sim.v src/core/biriscv_xilinx_2r1w.v src/core/riscv_core.v src/dcache/dcache.v src/dcache/dcache_axi.v src/dcache/dcache_axi_axi.v src/dcache/dcache_core.v src/dcache/dcache_core_data_ram.v src/dcache/dcache_core_tag_ram.v src/dcache/dcache_if_pmem.v src/dcache/dcache_mux.v src/dcache/dcache_pmem_mux.v src/icache/icache.v src/icache/icache_data_ram.v src/icache/icache_tag_ram.v src/top/riscv_top.v | |||
stage - (0.97 sec in block) | Utilities | |||
stage block (Utilities) - (0.36 sec in block) | ||||
getContext - (0.15 sec in self) | ||||
stage - (5.5 sec in block) | FPGA Build Pipeline | |||
stage block (FPGA Build Pipeline) - (4.9 sec in block) | ||||
getContext - (0.27 sec in self) | ||||
parallel - (4.3 sec in block) | ||||
parallel block (Branch: digilent_arty_a7_100t) - (3.9 sec in block) | ||||
stage - (3.5 sec in block) | digilent_arty_a7_100t | |||
stage block (digilent_arty_a7_100t) - (3.2 sec in block) | ||||
getContext - (0.37 sec in self) | ||||
stage - (0.91 sec in block) | Synthesis and PnR | |||
stage block (Synthesis and PnR) - (0.36 sec in block) | ||||
getContext - (0.15 sec in self) | ||||
stage - (0.89 sec in block) | Flash digilent_arty_a7_100t | |||
stage block (Flash digilent_arty_a7_100t) - (0.35 sec in block) | ||||
getContext - (0.15 sec in self) | ||||
stage - (0.66 sec in block) | Test digilent_arty_a7_100t | |||
stage block (Test digilent_arty_a7_100t) - (0.37 sec in block) | ||||
getContext - (0.15 sec in self) | ||||
stage - (0.78 sec in block) | Declarative: Post Actions | |||
stage block (Declarative: Post Actions) - (0.54 sec in block) | ||||
junit - (0.27 sec in self) | **/*.xml |