+ /eda/oss-cad-suite/bin/ghdl -a --std=08 klessydra-t0-3th/PKG_RiscV_Klessydra_thread_parameters.vhd klessydra-t0-3th/PKG_RiscV_Klessydra.vhd klessydra-t0-3th/PKG_RiscV_Klessydra.vhd klessydra-t0-3th/RTL-CSR_Unit.vhd klessydra-t0-3th/RTL-Debug_Unit.vhd klessydra-t0-3th/RTL-Processing_Pipeline.vhd klessydra-t0-3th/RTL-Program_Counter_unit.vhd klessydra-t0-3th/STR-Klessydra_top.vhd
klessydra-t0-3th/RTL-Program_Counter_unit.vhd:79:12:warning: declaration of "MTVEC" hides port "MTVEC" [-Whide]
signal MTVEC : in std_logic_vector(31 downto 0);
^
klessydra-t0-3th/RTL-Program_Counter_unit.vhd:80:12:warning: declaration of "instr_gnt_i" hides port "instr_gnt_i" [-Whide]
signal instr_gnt_i, taken_branch : in std_logic;
^
klessydra-t0-3th/RTL-Program_Counter_unit.vhd:80:25:warning: declaration of "taken_branch" hides port "taken_branch" [-Whide]
signal instr_gnt_i, taken_branch : in std_logic;
^
klessydra-t0-3th/RTL-Program_Counter_unit.vhd:81:12:warning: declaration of "wfi_condition_pending" hides signal "wfi_condition_pending" [-Whide]
signal wfi_condition_pending : inout std_logic;
^
klessydra-t0-3th/RTL-Program_Counter_unit.vhd:82:12:warning: declaration of "set_wfi_condition" hides port "set_wfi_condition" [-Whide]
signal set_wfi_condition : in std_logic;
^
klessydra-t0-3th/RTL-Program_Counter_unit.vhd:83:12:warning: declaration of "taken_branch_pending" hides port "taken_branch_pending" [-Whide]
signal taken_branch_pending : inout std_logic;
^
klessydra-t0-3th/RTL-Program_Counter_unit.vhd:84:12:warning: declaration of "irq_pending" hides port "irq_pending" [-Whide]
signal irq_pending : in std_logic;
^
klessydra-t0-3th/RTL-Program_Counter_unit.vhd:85:12:warning: declaration of "set_except_condition" hides port "set_except_condition" [-Whide]
signal set_except_condition : in std_logic;
^
klessydra-t0-3th/RTL-Program_Counter_unit.vhd:86:12:warning: declaration of "set_mret_condition" hides port "set_mret_condition" [-Whide]
signal set_mret_condition : in std_logic;
^
klessydra-t0-3th/RTL-Program_Counter_unit.vhd:87:12:warning: declaration of "pc" hides signal "pc" [-Whide]
signal pc : inout std_logic_vector(31 downto 0);
^
klessydra-t0-3th/RTL-Program_Counter_unit.vhd:88:12:warning: declaration of "taken_branch_pc_lat" hides port "taken_branch_pc_lat" [-Whide]
signal taken_branch_pc_lat : in std_logic_vector(31 downto 0);
^
klessydra-t0-3th/RTL-Program_Counter_unit.vhd:89:12:warning: declaration of "incremented_pc" hides port "incremented_pc" [-Whide]
signal incremented_pc : in std_logic_vector(31 downto 0);
^
klessydra-t0-3th/RTL-Program_Counter_unit.vhd:90:12:warning: declaration of "boot_pc" hides signal "boot_pc" [-Whide]
signal boot_pc : in std_logic_vector(31 downto 0);
^
klessydra-t0-3th/RTL-Program_Counter_unit.vhd:91:12:warning: declaration of "pc_update_enable" hides signal "pc_update_enable" [-Whide]
signal pc_update_enable : in std_logic;
^
klessydra-t0-3th/RTL-Program_Counter_unit.vhd:92:12:warning: declaration of "served_except_condition" hides port "served_except_condition" [-Whide]
signal served_except_condition : out std_logic;
^
klessydra-t0-3th/RTL-Program_Counter_unit.vhd:93:12:warning: declaration of "served_mret_condition" hides port "served_mret_condition" [-Whide]
signal served_mret_condition : out std_logic) is
^