Console Output

+ /eda/oss-cad-suite/bin/iverilog -o simulation.out -g2005 -s ssrv_top -I rtl/ rtl/alu.v rtl/define.v rtl/define_para.v rtl/include_func.v rtl/instrbits.v rtl/instrman.v rtl/lsu.v rtl/membuf.v rtl/mprf.v rtl/mul.v rtl/predictor.v rtl/schedule.v rtl/ssrv_top.v rtl/sys_csr.v
rtl/include_func.v:21: error: function declarations must be contained within a module.
rtl/include_func.v:261: error: function declarations must be contained within a module.
rtl/include_func.v:270: error: function declarations must be contained within a module.
rtl/include_func.v:279: error: function declarations must be contained within a module.
rtl/include_func.v:288: error: function declarations must be contained within a module.
rtl/include_func.v:294: error: function declarations must be contained within a module.
rtl/include_func.v:300: error: function declarations must be contained within a module.