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Start of Pipeline - (32 sec in block)
node - (31 sec in block)
node block - (30 sec in block)
stage - (4.9 sec in block)Git Clone
stage block (Git Clone) - (4 sec in block)
sh - (0.7 sec in self)rm -rf RS5
sh - (2.9 sec in self)git clone --recursive https://github.com/gaph-pucrs/RS5 RS5
stage - (3.5 sec in block)Simulation
stage block (Simulation) - (2.4 sec in block)
dir - (1.5 sec in block)RS5
dir block - (0.98 sec in block)
sh - (0.68 sec in self)iverilog -o simulation.out -g2012 -s RS5 -I rtl/ rtl/CSRBank.sv rtl/RS5.sv rtl/aes_unit.sv rtl/align.sv rtl/decode.sv rtl/decompresser.sv rtl/div.sv rtl/execute.sv rtl/fetch.sv rtl/mmu.sv rtl/mul.sv rtl/mulNbits.sv rtl/regbank.sv rtl/retire.sv rtl/vectorALU.sv rtl/vectorCSRs.sv rtl/vectorLSU.sv rtl/vectorRegbank.sv rtl/vectorUnit.sv rtl/aes/riscv_crypto_aes_fwd_sbox.sv rtl/aes/riscv_crypto_aes_sbox.sv rtl/aes/riscv_crypto_sbox_aes_out.sv rtl/aes/riscv_crypto_sbox_aes_top.sv rtl/aes/riscv_crypto_sbox_inv_mid.sv
stage - (18 sec in block)FPGA Build Pipeline
stage block (FPGA Build Pipeline) - (17 sec in block)
getContext - (0.54 sec in self)
parallel - (15 sec in block)
parallel block (Branch: colorlight_i9) - (0.11 sec in block)
stage - (13 sec in block)colorlight_i9
stage block (colorlight_i9) - (12 sec in block)
getContext - (1.3 sec in self)
stage - (3.5 sec in block)Síntese e PnR
stage block (Síntese e PnR) - (1.2 sec in block)
getContext - (0.33 sec in self)
stage - (3.4 sec in block)Flash colorlight_i9
stage block (Flash colorlight_i9) - (1.2 sec in block)
getContext - (0.38 sec in self)
stage - (2.4 sec in block)Teste colorlight_i9
stage block (Teste colorlight_i9) - (1.1 sec in block)
getContext - (0.3 sec in self)
parallel block (Branch: digilent_nexys4_ddr) - (14 sec in block)
stage - (13 sec in block)digilent_nexys4_ddr
stage block (digilent_nexys4_ddr) - (12 sec in block)
getContext - (1.2 sec in self)
stage - (3.5 sec in block)Síntese e PnR
stage block (Síntese e PnR) - (1.4 sec in block)
getContext - (0.35 sec in self)
stage - (3.4 sec in block)Flash digilent_nexys4_ddr
stage block (Flash digilent_nexys4_ddr) - (1.4 sec in block)
getContext - (0.34 sec in self)
stage - (2.4 sec in block)Teste digilent_nexys4_ddr
stage block (Teste digilent_nexys4_ddr) - (1.3 sec in block)
getContext - (0.33 sec in self)
stage - (2.6 sec in block)Declarative: Post Actions
stage block (Declarative: Post Actions) - (2.1 sec in block)
dir - (1.3 sec in block)RS5
dir block - (0.88 sec in block)
sh - (0.52 sec in self)rm -rf *