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Started by timer
[Pipeline] Start of Pipeline
[Pipeline] node
Still waiting to schedule task
Waiting for next available executor
Running on Jenkins in /var/jenkins_home/workspace/I2SRV64-SS-v1
[Pipeline] {
[Pipeline] stage
[Pipeline] { (Git Clone)
[Pipeline] sh
+ rm -rf I2SRV64-SS-v1
[Pipeline] sh
+ git clone --recursive --depth=1 https://github.com/RClabiisc/I2SRV64-SS-v1 I2SRV64-SS-v1
Cloning into 'I2SRV64-SS-v1'...
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[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Simulation)
[Pipeline] dir
Running in /var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1
[Pipeline] {
[Pipeline] echo
simulation not supported for mixed VHDL and Verilog files
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Utilities)
[Pipeline] dir
Running in /var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1
[Pipeline] {
[Pipeline] sh
+ pwd
+ python3 /eda/processor_ci/core/labeler_prototype.py -d /var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1 -c /eda/processor_ci/config.json -o /eda/processor_ci_utils/labels.json
WARNING: Error writing to JSON file: [Errno 30] Read-only file system: '/eda/processor_ci_utils/labels.json'
Trying to read file: /var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/AXI4lite_PBUS_XBar/hdl/axi_crossbar_v2_1_vl_rfs.v
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (FPGA Build Pipeline)
[Pipeline] parallel
[Pipeline] { (Branch: colorlight_i9)
[Pipeline] { (Branch: digilent_arty_a7_100t)
[Pipeline] stage
[Pipeline] { (colorlight_i9)
[Pipeline] stage
[Pipeline] { (digilent_arty_a7_100t)
[Pipeline] lock
Trying to acquire lock on [Resource: colorlight_i9]
Resource [colorlight_i9] did not exist. Created.
Lock acquired on [Resource: colorlight_i9]
[Pipeline] {
[Pipeline] lock
Trying to acquire lock on [Resource: digilent_arty_a7_100t]
Resource [digilent_arty_a7_100t] did not exist. Created.
Lock acquired on [Resource: digilent_arty_a7_100t]
[Pipeline] {
[Pipeline] stage
[Pipeline] { (Synthesis and PnR)
[Pipeline] stage
[Pipeline] { (Synthesis and PnR)
[Pipeline] dir
Running in /var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1
[Pipeline] {
[Pipeline] dir
Running in /var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1
[Pipeline] {
[Pipeline] echo
Starting synthesis for FPGA colorlight_i9.
[Pipeline] sh
[Pipeline] echo
Starting synthesis for FPGA digilent_arty_a7_100t.
+ python3 /eda/processor_ci/main.py -c /eda/processor_ci/config.json -p I2SRV64-SS-v1 -b colorlight_i9
[Pipeline] sh
Final configuration file generated at /var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/build_colorlight_i9.tcl
Error executing Makefile.
/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/AXI4lite_PBUS_XBar/hdl/axi_register_slice_v2_1_vl_rfs.v:1532: ERROR: syntax error, unexpected TOK_GENERATE
make: *** [/eda/processor_ci/makefiles/colorlight_i9.mk:12: colorlight_i9.json] Error 1

Traceback (most recent call last):
  File "/eda/processor_ci/main.py", line 135, in <module>
    main(
  File "/eda/processor_ci/main.py", line 82, in main
    build(build_file_path, board_name, toolchain_path)
  File "/eda/processor_ci/core/fpga.py", line 218, in build
    raise subprocess.CalledProcessError(process.returncode, 'make')
subprocess.CalledProcessError: Command 'make' returned non-zero exit status 2.
+ python3 /eda/processor_ci/main.py -c /eda/processor_ci/config.json -p I2SRV64-SS-v1 -b digilent_arty_a7_100t
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Flash colorlight_i9)
Stage "Flash colorlight_i9" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Test colorlight_i9)
Stage "Test colorlight_i9" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Lock released on resource [Resource: colorlight_i9]
[Pipeline] // lock
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Failed in branch colorlight_i9
Final configuration file generated at /var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/build_digilent_arty_a7_100t.tcl
Error executing Makefile.
ERROR: [Synth 8-9263] cannot open include file 'ltlib_v1_0_0_ver.vh' [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/ltlib_v1_0_vl_rfs.v:932]
ERROR: [Synth 8-9263] cannot open include file 'ltlib_v1_0_0_lib_fn.vh' [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/ltlib_v1_0_vl_rfs.v:953]
ERROR: [Synth 8-9263] cannot open include file 'ltlib_v1_0_0_ver.vh' [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/ltlib_v1_0_vl_rfs.v:999]
ERROR: [Synth 8-9263] cannot open include file 'ltlib_v1_0_0_lib_fn.vh' [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/ltlib_v1_0_vl_rfs.v:1013]
ERROR: [Synth 8-9263] cannot open include file 'ltlib_v1_0_0_ver.vh' [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/ltlib_v1_0_vl_rfs.v:1053]
ERROR: [Synth 8-9263] cannot open include file 'ltlib_v1_0_0_ver.vh' [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/ltlib_v1_0_vl_rfs.v:1111]
ERROR: [Synth 8-9263] cannot open include file 'ltlib_v1_0_0_ver.vh' [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/ltlib_v1_0_vl_rfs.v:1190]
ERROR: [Synth 8-9263] cannot open include file 'ltlib_v1_0_0_ver.vh' [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/ltlib_v1_0_vl_rfs.v:1284]
ERROR: [Synth 8-9263] cannot open include file 'ltlib_v1_0_0_ver.vh' [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/ltlib_v1_0_vl_rfs.v:1402]
ERROR: [Synth 8-9263] cannot open include file 'ltlib_v1_0_0_lib_fn.vh' [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/ltlib_v1_0_vl_rfs.v:1595]
ERROR: [Synth 8-9263] cannot open include file 'ltlib_v1_0_0_lib_fn.vh' [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/ltlib_v1_0_vl_rfs.v:1865]
ERROR: [Synth 8-9263] cannot open include file 'ltlib_v1_0_0_ver.vh' [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/ltlib_v1_0_vl_rfs.v:1905]
ERROR: [Synth 8-9263] cannot open include file 'ltlib_v1_0_0_ver.vh' [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/ltlib_v1_0_vl_rfs.v:2005]
ERROR: [Synth 8-5809] Error generated from encrypted envelope. [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/ltlib_v1_0_vl_rfs.v:2169]
ERROR: [Synth 8-5809] Error generated from encrypted envelope. [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/ltlib_v1_0_vl_rfs.v:2193]
ERROR: [Synth 8-5809] Error generated from encrypted envelope. [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/xsdbs_v1_0_vl_rfs.v:23]
ERROR: [Synth 8-5809] Error generated from encrypted envelope. [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/xsdbs_v1_0_vl_rfs.v:77]
ERROR: [Synth 8-9263] cannot open include file 'xsdbs_v1_0_2_i2x.vh' [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/xsdbs_v1_0_vl_rfs.v:262]
ERROR: [Synth 8-9263] cannot open include file 'xsdbs_v1_0_2_i2x.vh' [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/JTAG_to_AXI4/hdl/xsdbs_v1_0_vl_rfs.v:382]
ERROR: [Synth 8-5832] source file was generated for simulation and is not permitted as input to synthesis [/var/jenkins_home/workspace/I2SRV64-SS-v1/I2SRV64-SS-v1/Hardware_Source_Files/IP/AXI64_L2_XBar/AXI64_L2_XBar_sim_netlist.v:16]
ERROR: [Synth 8-439] module 'Controller' not found [/eda/processor_ci/rtl/I2SRV64-SS-v1.v:48]
ERROR: [Synth 8-6156] failed synthesizing module 'processorci_top' [/eda/processor_ci/rtl/I2SRV64-SS-v1.v:1]
ERROR: [Common 17-69] Command failed: Synthesis failed - please see the console or run log file for details
make: *** [/eda/processor_ci/makefiles/digilent_arty_a7_100t.mk:12: digilent_arty_a7_100t.bit] Error 1

Traceback (most recent call last):
  File "/eda/processor_ci/main.py", line 135, in <module>
    main(
  File "/eda/processor_ci/main.py", line 82, in main
    build(build_file_path, board_name, toolchain_path)
  File "/eda/processor_ci/core/fpga.py", line 218, in build
    raise subprocess.CalledProcessError(process.returncode, 'make')
subprocess.CalledProcessError: Command 'make' returned non-zero exit status 2.
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Flash digilent_arty_a7_100t)
Stage "Flash digilent_arty_a7_100t" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Test digilent_arty_a7_100t)
Stage "Test digilent_arty_a7_100t" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Lock released on resource [Resource: digilent_arty_a7_100t]
[Pipeline] // lock
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Failed in branch digilent_arty_a7_100t
[Pipeline] // parallel
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Declarative: Post Actions)
[Pipeline] junit
Recording test results
No test report files were found. Configuration error?
Error when executing always post condition:
Also:   org.jenkinsci.plugins.workflow.actions.ErrorAction$ErrorId: 4f785613-411d-47b4-ae17-fc19c3b8d135
hudson.AbortException: No test report files were found. Configuration error?
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitParser$ParseResultCallable.invoke(JUnitParser.java:253)
	at hudson.FilePath.act(FilePath.java:1234)
	at hudson.FilePath.act(FilePath.java:1217)
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitParser.parseResult(JUnitParser.java:146)
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitResultArchiver.parse(JUnitResultArchiver.java:177)
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitResultArchiver.parseAndSummarize(JUnitResultArchiver.java:282)
	at PluginClassLoader for junit//hudson.tasks.junit.pipeline.JUnitResultsStepExecution.run(JUnitResultsStepExecution.java:62)
	at PluginClassLoader for junit//hudson.tasks.junit.pipeline.JUnitResultsStepExecution.run(JUnitResultsStepExecution.java:27)
	at PluginClassLoader for workflow-step-api//org.jenkinsci.plugins.workflow.steps.SynchronousNonBlockingStepExecution.lambda$start$0(SynchronousNonBlockingStepExecution.java:47)
	at java.base/java.util.concurrent.Executors$RunnableAdapter.call(Unknown Source)
	at java.base/java.util.concurrent.FutureTask.run(Unknown Source)
	at java.base/java.util.concurrent.ThreadPoolExecutor.runWorker(Unknown Source)
	at java.base/java.util.concurrent.ThreadPoolExecutor$Worker.run(Unknown Source)
	at java.base/java.lang.Thread.run(Unknown Source)

[Pipeline] }
[Pipeline] // stage
[Pipeline] }
[Pipeline] // node
[Pipeline] End of Pipeline
ERROR: script returned exit code 1
Finished: FAILURE