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Start of Pipeline - (18 sec in block)
node - (18 sec in block)
node block - (17 sec in block)
stage - (3.1 sec in block)Git Clone
stage block (Git Clone) - (2.6 sec in block)
sh - (0.69 sec in self)rm -rf DV-CPU-RV
sh - (1.7 sec in self)git clone --recursive --depth=1 https://github.com/devindang/dv-cpu-rv.git DV-CPU-RV
stage - (1.7 sec in block)Simulation
stage block (Simulation) - (1.2 sec in block)
dir - (0.87 sec in block)DV-CPU-RV
dir block - (0.62 sec in block)
sh - (0.41 sec in self)/eda/oss-cad-suite/bin/iverilog -o simulation.out -g2005 -s rv_core core/rtl/rv_alu.v core/rtl/rv_alu_ctrl.v core/rtl/rv_branch_predict.v core/rtl/rv_branch_test.v core/rtl/rv_core.v core/rtl/rv_ctrl.v core/rtl/rv_data_mem.v core/rtl/rv_div.v core/rtl/rv_dpram.v core/rtl/rv_forward.v core/rtl/rv_hzd_detect.v core/rtl/rv_imm_gen.v core/rtl/rv_instr_mem.v core/rtl/rv_mem_map.v core/rtl/rv_mul.v core/rtl/rv_rf.v
stage - (2 sec in block)Utilities
stage block (Utilities) - (1.5 sec in block)
dir - (1 sec in block)DV-CPU-RV
dir block - (0.68 sec in block)
sh - (0.46 sec in self)python3 /eda/processor_ci/core/labeler_prototype.py -d $(pwd) -c /eda/processor_ci/config.json -o /jenkins/processor_ci_utils/labels
stage - (9.4 sec in block)FPGA Build Pipeline
stage block (FPGA Build Pipeline) - (8.8 sec in block)
getContext - (0.26 sec in self)
parallel - (8.2 sec in block)
parallel block (Branch: colorlight_i9) - (51 ms in block)
stage - (6.7 sec in block)colorlight_i9
stage block (colorlight_i9) - (6.3 sec in block)
getContext - (0.67 sec in self)
stage - (1.7 sec in block)Synthesis and PnR
stage block (Synthesis and PnR) - (0.64 sec in block)
getContext - (0.17 sec in self)
stage - (1.7 sec in block)Flash colorlight_i9
stage block (Flash colorlight_i9) - (0.62 sec in block)
getContext - (0.17 sec in self)
stage - (1.2 sec in block)Test colorlight_i9
stage block (Test colorlight_i9) - (0.62 sec in block)
getContext - (0.21 sec in self)
parallel block (Branch: digilent_arty_a7_100t) - (7.5 sec in block)
stage - (6.7 sec in block)digilent_arty_a7_100t
stage block (digilent_arty_a7_100t) - (6.2 sec in block)
getContext - (0.64 sec in self)
stage - (1.7 sec in block)Synthesis and PnR
stage block (Synthesis and PnR) - (0.71 sec in block)
getContext - (0.15 sec in self)
stage - (1.7 sec in block)Flash digilent_arty_a7_100t
stage block (Flash digilent_arty_a7_100t) - (0.72 sec in block)
getContext - (0.17 sec in self)
stage - (1.2 sec in block)Test digilent_arty_a7_100t
stage block (Test digilent_arty_a7_100t) - (0.76 sec in block)
getContext - (0.16 sec in self)
stage - (0.77 sec in block)Declarative: Post Actions
stage block (Declarative: Post Actions) - (0.51 sec in block)
junit - (0.26 sec in self)**/test-reports/*.xml