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.clang-formatMay 2, 2025, 5:49:58 AM275 B
build_digilent_arty_a7_100t.tclMay 2, 2025, 5:50:04 AM2.17 KiB
clockInfo.txtMay 2, 2025, 5:51:41 AM375 B
CODING_STYLE.mdMay 2, 2025, 5:49:58 AM4.40 KiB
CONTRIBUTING.mdMay 2, 2025, 5:49:58 AM879 B
CONTRIBUTORS.mdMay 2, 2025, 5:49:58 AM452 B
digilent_arty_a7_100t.bitMay 2, 2025, 5:52:47 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptMay 2, 2025, 5:51:50 AM22.60 KiB
digilent_arty_a7_control_sets.rptMay 2, 2025, 5:51:49 AM22.38 KiB
digilent_arty_a7_drc.rptMay 2, 2025, 5:52:26 AM2.36 KiB
digilent_arty_a7_io.rptMay 2, 2025, 5:51:49 AM96.82 KiB
digilent_arty_a7_power.rptMay 2, 2025, 5:52:28 AM8.62 KiB
digilent_arty_a7_route_status.rptMay 2, 2025, 5:52:25 AM651 B
digilent_arty_a7_timing.rptMay 2, 2025, 5:52:27 AM22.59 KiB
digilent_arty_a7_utilization_hierarchical_place.rptMay 2, 2025, 5:51:49 AM3.34 KiB
digilent_arty_a7_utilization_place.rptMay 2, 2025, 5:51:49 AM10.61 KiB
LICENSE.mdMay 2, 2025, 5:49:58 AM1.07 KiB
mkdocs.ymlMay 2, 2025, 5:49:58 AM1.74 KiB
processor_ci_defines.vhMay 2, 2025, 5:50:04 AM300 B
README.mdMay 2, 2025, 5:49:58 AM1.31 KiB
simulation.outMay 2, 2025, 5:49:59 AM164.19 KiB