Skip to content

Workspace

.git
.github
.Xil
docs
fpga
software
src
tests
.gitattributesMay 5, 2025, 4:55:04 AM29 B
.gitignoreMay 5, 2025, 4:55:04 AM21 B
build_digilent_arty_a7_100t.tclMay 5, 2025, 4:55:11 AM2.99 KiB
clockInfo.txtMay 5, 2025, 4:56:08 AM375 B
digilent_arty_a7_100t.bitMay 5, 2025, 4:57:02 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptMay 5, 2025, 4:56:12 AM16.56 KiB
digilent_arty_a7_control_sets.rptMay 5, 2025, 4:56:12 AM12.48 KiB
digilent_arty_a7_drc.rptMay 5, 2025, 4:56:43 AM2.36 KiB
digilent_arty_a7_io.rptMay 5, 2025, 4:56:12 AM96.82 KiB
digilent_arty_a7_power.rptMay 5, 2025, 4:56:44 AM8.55 KiB
digilent_arty_a7_route_status.rptMay 5, 2025, 4:56:42 AM651 B
digilent_arty_a7_timing.rptMay 5, 2025, 4:56:43 AM18.47 KiB
digilent_arty_a7_utilization_hierarchical_place.rptMay 5, 2025, 4:56:12 AM3.09 KiB
digilent_arty_a7_utilization_place.rptMay 5, 2025, 4:56:12 AM10.57 KiB
LICENSEMay 5, 2025, 4:55:04 AM1.05 KiB
processor_ci_defines.vhMay 5, 2025, 4:55:11 AM300 B
README.mdMay 5, 2025, 4:55:04 AM2.08 KiB
simulation.outMay 5, 2025, 4:55:06 AM56.82 KiB