| .git |
| .github |
| .Xil |
| benchmarks |
| docs |
| firmware |
| fpga |
| rtl |
| testbenchs |
| verification_tests |
| .gitattributes | May 2, 2025, 1:15:03 AM | 230 B | |
| .gitignore | May 2, 2025, 1:15:03 AM | 997 B | |
| .gitmodules | May 2, 2025, 1:15:03 AM | 235 B | |
| .verilog-format.properties | May 2, 2025, 1:15:03 AM | 263 B | |
| build_digilent_arty_a7_100t.tcl | May 2, 2025, 1:15:11 AM | 4.25 KiB | |
| clockInfo.txt | May 2, 2025, 1:17:06 AM | 375 B | |
| CODE_OF_CONDUCT.md | May 2, 2025, 1:15:03 AM | 1.96 KiB | |
| CONTRIBUTING.md | May 2, 2025, 1:15:03 AM | 2.18 KiB | |
| digilent_arty_a7_100t.bit | May 2, 2025, 1:18:23 AM | 3.65 MiB | |
| digilent_arty_a7_clock_utilization.rpt | May 2, 2025, 1:17:18 AM | 21.79 KiB | |
| digilent_arty_a7_control_sets.rpt | May 2, 2025, 1:17:17 AM | 30.70 KiB | |
| digilent_arty_a7_drc.rpt | May 2, 2025, 1:18:00 AM | 8.33 KiB | |
| digilent_arty_a7_io.rpt | May 2, 2025, 1:17:17 AM | 96.82 KiB | |
| digilent_arty_a7_power.rpt | May 2, 2025, 1:18:03 AM | 8.89 KiB | |
| digilent_arty_a7_route_status.rpt | May 2, 2025, 1:17:58 AM | 651 B | |
| digilent_arty_a7_timing.rpt | May 2, 2025, 1:18:01 AM | 22.61 KiB | |
| digilent_arty_a7_utilization_hierarchical_place.rpt | May 2, 2025, 1:17:17 AM | 5.81 KiB | |
| digilent_arty_a7_utilization_place.rpt | May 2, 2025, 1:17:17 AM | 10.79 KiB | |
| LICENSE | May 2, 2025, 1:15:03 AM | 8.06 KiB | |
| LICENSE-CC | May 2, 2025, 1:15:03 AM | 19.14 KiB | |
| LICENSE-MIT | May 2, 2025, 1:15:03 AM | 1.05 KiB | |
| processor_ci_defines.vh | May 2, 2025, 1:15:11 AM | 300 B | |
| README_pt.md | May 2, 2025, 1:15:03 AM | 3.24 KiB | |
| README.md | May 2, 2025, 1:15:03 AM | 3.28 KiB | |
| run_test.sh | May 2, 2025, 1:15:03 AM | 1.49 KiB | |
| SECURITY.md | May 2, 2025, 1:15:03 AM | 2.20 KiB | |
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