Started by timer
[Pipeline] Start of Pipeline
[Pipeline] node
Running on Jenkins in /var/jenkins_home/workspace/Grande-Risco-5
[Pipeline] {
[Pipeline] stage
[Pipeline] { (Git Clone)
[Pipeline] sh
+ rm -rf test_results_1744289596.7344325.xml
[Pipeline] sh
+ rm -rf Grande-Risco-5
[Pipeline] sh
+ git clone --recursive --depth=1 https://github.com/JN513/Grande-Risco-5 Grande-Risco-5
Cloning into 'Grande-Risco-5'...
Submodule 'benchmarks/coremark' (https://github.com/eembc/coremark.git) registered for path 'benchmarks/coremark'
Cloning into '/var/jenkins_home/workspace/Grande-Risco-5/Grande-Risco-5/benchmarks/coremark'...
Submodule path 'benchmarks/coremark': checked out 'd5fad6bd094899101a4e5fd53af7298160ced6ab'
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Simulation)
[Pipeline] dir
Running in /var/jenkins_home/workspace/Grande-Risco-5/Grande-Risco-5
[Pipeline] {
[Pipeline] echo
simulation not supported for System Verilog files
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Utilities)
[Pipeline] dir
Running in /var/jenkins_home/workspace/Grande-Risco-5/Grande-Risco-5
[Pipeline] {
[Pipeline] sh
+ pwd
+ python3 /eda/processor_ci/core/labeler_prototype.py -d /var/jenkins_home/workspace/Grande-Risco-5/Grande-Risco-5 -c /eda/processor_ci/config -o /jenkins/processor_ci_utils/labels
Trying to read file: /var/jenkins_home/workspace/Grande-Risco-5/Grande-Risco-5/rtl/core/Grande_Risco5.sv
Cache-related signals in fifo_tb.sv
Possible cache file: i_cache_test.sv
Possible cache file: d_cache_test.sv
Cache-related signals in fifo.sv
Cache-related signals in uart.sv
Possible cache file: cache_request_multiplexer.sv
Possible cache file: d_cache.sv
Cache-related signals in d_cache.sv
Possible cache file: i_cache.sv
Results saved to /jenkins/processor_ci_utils/labels/Grande-Risco-5.json
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (FPGA Build Pipeline)
[Pipeline] parallel
[Pipeline] { (Branch: digilent_arty_a7_100t)
[Pipeline] stage
[Pipeline] { (digilent_arty_a7_100t)
[Pipeline] lock
Trying to acquire lock on [Resource: digilent_arty_a7_100t]
Resource [digilent_arty_a7_100t] did not exist. Created.
Lock acquired on [Resource: digilent_arty_a7_100t]
[Pipeline] {
[Pipeline] stage
[Pipeline] { (Synthesis and PnR)
[Pipeline] dir
Running in /var/jenkins_home/workspace/Grande-Risco-5/Grande-Risco-5
[Pipeline] {
[Pipeline] echo
Starting synthesis for FPGA digilent_arty_a7_100t.
[Pipeline] sh
+ python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p Grande-Risco-5 -b digilent_arty_a7_100t
[LOCK] Criado: run.lock
File 'processor_ci_defines.vh' generated for board: 'digilent_arty_a7_100t'.
Final configuration file generated at /var/jenkins_home/workspace/Grande-Risco-5/Grande-Risco-5/build_digilent_arty_a7_100t.tcl
[LOCK] Removido: run.lock
Error executing Makefile.
ERROR: [Common 17-69] Command failed: File '/eda/processor-ci-controller/rtl/ahblite_to_wishbone.sv' does not exist
make: *** [/eda/processor_ci/makefiles/digilent_arty_a7_100t.mk:12: digilent_arty_a7_100t.bit] Error 1

Traceback (most recent call last):
  File "/eda/processor_ci/main.py", line 142, in <module>
    main(
  File "/eda/processor_ci/main.py", line 89, in main
    build(build_file_path, board_name, toolchain_path)
  File "/eda/processor_ci/core/fpga.py", line 296, in build
    raise subprocess.CalledProcessError(process.returncode, 'make')
subprocess.CalledProcessError: Command 'make' returned non-zero exit status 2.
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Flash digilent_arty_a7_100t)
Stage "Flash digilent_arty_a7_100t" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Test digilent_arty_a7_100t)
Stage "Test digilent_arty_a7_100t" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Lock released on resource [Resource: digilent_arty_a7_100t]
[Pipeline] // lock
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Failed in branch digilent_arty_a7_100t
[Pipeline] // parallel
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Declarative: Post Actions)
[Pipeline] junit
Recording test results
No test report files were found. Configuration error?
Error when executing always post condition:
Also:   org.jenkinsci.plugins.workflow.actions.ErrorAction$ErrorId: aeb183ce-54fc-4bc3-9bee-194fd3ee363e
hudson.AbortException: No test report files were found. Configuration error?
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitParser$ParseResultCallable.invoke(JUnitParser.java:253)
	at hudson.FilePath.act(FilePath.java:1234)
	at hudson.FilePath.act(FilePath.java:1217)
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitParser.parseResult(JUnitParser.java:146)
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitResultArchiver.parse(JUnitResultArchiver.java:177)
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitResultArchiver.parseAndSummarize(JUnitResultArchiver.java:282)
	at PluginClassLoader for junit//hudson.tasks.junit.pipeline.JUnitResultsStepExecution.run(JUnitResultsStepExecution.java:62)
	at PluginClassLoader for junit//hudson.tasks.junit.pipeline.JUnitResultsStepExecution.run(JUnitResultsStepExecution.java:27)
	at PluginClassLoader for workflow-step-api//org.jenkinsci.plugins.workflow.steps.SynchronousNonBlockingStepExecution.lambda$start$0(SynchronousNonBlockingStepExecution.java:49)
	at java.base/java.util.concurrent.Executors$RunnableAdapter.call(Unknown Source)
	at java.base/java.util.concurrent.FutureTask.run(Unknown Source)
	at java.base/java.util.concurrent.ThreadPoolExecutor.runWorker(Unknown Source)
	at java.base/java.util.concurrent.ThreadPoolExecutor$Worker.run(Unknown Source)
	at java.base/java.lang.Thread.run(Unknown Source)

[Pipeline] }
[Pipeline] // stage
[Pipeline] }
[Pipeline] // node
[Pipeline] End of Pipeline
ERROR: script returned exit code 1
Finished: FAILURE