Started by user <a href='/jenkins/user/julio' class='jenkins-table__link model-link model-link--float'>Julio Nunes Avelar</a>
Restarted from build #161, stage FPGA Build Pipeline
<span class="pipeline-new-node" nodeId="2" startId="2">[Pipeline] Start of Pipeline
</span><span class="pipeline-new-node" nodeId="3" startId="3" enclosingId="2">[Pipeline] node
</span><span class="pipeline-node-3">Running on <a href='/jenkins/computer/(built-in)/' class='jenkins-table__link model-link model-link--float'>Jenkins</a> in /var/jenkins_home/workspace/Grande-Risco-5
</span><span class="pipeline-new-node" nodeId="4" startId="4" enclosingId="3">[Pipeline] {
</span><span class="pipeline-new-node" nodeId="5" startId="5" enclosingId="4">[Pipeline] stage
</span><span class="pipeline-new-node" nodeId="6" startId="6" enclosingId="5" label="Git Clone">[Pipeline] { (Git Clone)
</span>Stage "Git Clone" skipped due to this build restarting at stage "FPGA Build Pipeline"
<span class="pipeline-new-node" nodeId="7" enclosingId="6">[Pipeline] getContext
</span><span class="pipeline-new-node" nodeId="8" startId="6">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="9" startId="5">[Pipeline] // stage
</span><span class="pipeline-new-node" nodeId="10" startId="10" enclosingId="4">[Pipeline] stage
</span><span class="pipeline-new-node" nodeId="11" startId="11" enclosingId="10" label="Simulation">[Pipeline] { (Simulation)
</span>Stage "Simulation" skipped due to this build restarting at stage "FPGA Build Pipeline"
<span class="pipeline-new-node" nodeId="12" enclosingId="11">[Pipeline] getContext
</span><span class="pipeline-new-node" nodeId="13" startId="11">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="14" startId="10">[Pipeline] // stage
</span><span class="pipeline-new-node" nodeId="15" startId="15" enclosingId="4">[Pipeline] stage
</span><span class="pipeline-new-node" nodeId="16" startId="16" enclosingId="15" label="Utilities">[Pipeline] { (Utilities)
</span>Stage "Utilities" skipped due to this build restarting at stage "FPGA Build Pipeline"
<span class="pipeline-new-node" nodeId="17" enclosingId="16">[Pipeline] getContext
</span><span class="pipeline-new-node" nodeId="18" startId="16">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="19" startId="15">[Pipeline] // stage
</span><span class="pipeline-new-node" nodeId="20" startId="20" enclosingId="4">[Pipeline] stage
</span><span class="pipeline-new-node" nodeId="21" startId="21" enclosingId="20" label="FPGA Build Pipeline">[Pipeline] { (FPGA Build Pipeline)
</span><span class="pipeline-new-node" nodeId="22" startId="22" enclosingId="21">[Pipeline] parallel
</span><span class="pipeline-new-node" nodeId="24" startId="24" enclosingId="22" label="Branch: colorlight_i9">[Pipeline] { (Branch: colorlight_i9)
</span><span class="pipeline-new-node" nodeId="25" startId="25" enclosingId="22" label="Branch: digilent_arty_a7_100t">[Pipeline] { (Branch: digilent_arty_a7_100t)
</span><span class="pipeline-new-node" nodeId="26" startId="26" enclosingId="24">[Pipeline] stage
</span><span class="pipeline-new-node" nodeId="27" startId="27" enclosingId="26" label="colorlight_i9">[Pipeline] { (colorlight_i9)
</span><span class="pipeline-new-node" nodeId="28" startId="28" enclosingId="25">[Pipeline] stage
</span><span class="pipeline-new-node" nodeId="29" startId="29" enclosingId="28" label="digilent_arty_a7_100t">[Pipeline] { (digilent_arty_a7_100t)
</span><span class="pipeline-new-node" nodeId="30" startId="30" enclosingId="27">[Pipeline] lock
</span><span class="pipeline-node-30">Trying to acquire lock on [Resource: colorlight_i9]
Resource [colorlight_i9] did not exist. Created.
Lock acquired on [Resource: colorlight_i9]
</span><span class="pipeline-new-node" nodeId="31" startId="31" enclosingId="30">[Pipeline] {
</span><span class="pipeline-new-node" nodeId="32" startId="32" enclosingId="29">[Pipeline] lock
</span><span class="pipeline-node-32">Trying to acquire lock on [Resource: digilent_arty_a7_100t]
Resource [digilent_arty_a7_100t] did not exist. Created.
Lock acquired on [Resource: digilent_arty_a7_100t]
</span><span class="pipeline-new-node" nodeId="33" startId="33" enclosingId="32">[Pipeline] {
</span><span class="pipeline-new-node" nodeId="34" startId="34" enclosingId="31">[Pipeline] stage
</span><span class="pipeline-new-node" nodeId="35" startId="35" enclosingId="34" label="Synthesis and PnR">[Pipeline] { (Synthesis and PnR)
</span><span class="pipeline-new-node" nodeId="36" startId="36" enclosingId="33">[Pipeline] stage
</span><span class="pipeline-new-node" nodeId="37" startId="37" enclosingId="36" label="Synthesis and PnR">[Pipeline] { (Synthesis and PnR)
</span><span class="pipeline-new-node" nodeId="38" startId="38" enclosingId="35">[Pipeline] dir
</span><span class="pipeline-node-38">Running in /var/jenkins_home/workspace/Grande-Risco-5/Grande-Risco-5
</span><span class="pipeline-new-node" nodeId="39" startId="39" enclosingId="38">[Pipeline] {
</span><span class="pipeline-new-node" nodeId="40" startId="40" enclosingId="37">[Pipeline] dir
</span><span class="pipeline-node-40">Running in /var/jenkins_home/workspace/Grande-Risco-5/Grande-Risco-5
</span><span class="pipeline-new-node" nodeId="41" startId="41" enclosingId="40">[Pipeline] {
</span><span class="pipeline-new-node" nodeId="42" enclosingId="39">[Pipeline] echo
</span><span class="pipeline-node-42">Starting synthesis for FPGA colorlight_i9.
</span><span class="pipeline-new-node" nodeId="43" enclosingId="39">[Pipeline] sh
</span><span class="pipeline-new-node" nodeId="44" enclosingId="41">[Pipeline] echo
</span><span class="pipeline-node-44">Starting synthesis for FPGA digilent_arty_a7_100t.
</span><span class="pipeline-node-43">+ python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p Grande-Risco-5 -b colorlight_i9
[LOCK] Criado: run.lock
File 'processor_ci_defines.vh' generated for board: 'colorlight_i9'.
Final configuration file generated at /var/jenkins_home/workspace/Grande-Risco-5/Grande-Risco-5/build_colorlight_i9.tcl
[LOCK] Removido: run.lock
Makefile executed successfully.
Makefile output:
make: Nothing to be done for 'all'.

</span><span class="pipeline-new-node" nodeId="45" enclosingId="41">[Pipeline] sh
</span><span class="pipeline-new-node" nodeId="46" startId="39">[Pipeline] }
</span><span class="pipeline-node-45">+ python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p Grande-Risco-5 -b digilent_arty_a7_100t
[LOCK] Criado: run.lock
File 'processor_ci_defines.vh' generated for board: 'digilent_arty_a7_100t'.
Final configuration file generated at /var/jenkins_home/workspace/Grande-Risco-5/Grande-Risco-5/build_digilent_arty_a7_100t.tcl
[LOCK] Removido: run.lock
Makefile executed successfully.
Makefile output:
make: Nothing to be done for 'all'.

</span><span class="pipeline-new-node" nodeId="47" startId="38">[Pipeline] // dir
</span><span class="pipeline-new-node" nodeId="48" startId="35">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="49" startId="41">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="50" startId="34">[Pipeline] // stage
</span><span class="pipeline-new-node" nodeId="51" startId="40">[Pipeline] // dir
</span><span class="pipeline-new-node" nodeId="52" startId="37">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="53" startId="36">[Pipeline] // stage
</span><span class="pipeline-new-node" nodeId="54" startId="54" enclosingId="31">[Pipeline] stage
</span><span class="pipeline-new-node" nodeId="55" startId="55" enclosingId="54" label="Flash colorlight_i9">[Pipeline] { (Flash colorlight_i9)
</span><span class="pipeline-new-node" nodeId="56" startId="56" enclosingId="33">[Pipeline] stage
</span><span class="pipeline-new-node" nodeId="57" startId="57" enclosingId="56" label="Flash digilent_arty_a7_100t">[Pipeline] { (Flash digilent_arty_a7_100t)
</span><span class="pipeline-new-node" nodeId="58" startId="58" enclosingId="55">[Pipeline] dir
</span><span class="pipeline-node-58">Running in /var/jenkins_home/workspace/Grande-Risco-5/Grande-Risco-5
</span><span class="pipeline-new-node" nodeId="59" startId="59" enclosingId="58">[Pipeline] {
</span><span class="pipeline-new-node" nodeId="60" startId="60" enclosingId="57">[Pipeline] dir
</span><span class="pipeline-node-60">Running in /var/jenkins_home/workspace/Grande-Risco-5/Grande-Risco-5
</span><span class="pipeline-new-node" nodeId="61" startId="61" enclosingId="60">[Pipeline] {
</span><span class="pipeline-new-node" nodeId="62" enclosingId="59">[Pipeline] echo
</span><span class="pipeline-node-62">Flashing FPGA colorlight_i9.
</span><span class="pipeline-new-node" nodeId="63" enclosingId="59">[Pipeline] sh
</span><span class="pipeline-new-node" nodeId="64" enclosingId="61">[Pipeline] echo
</span><span class="pipeline-node-64">Flashing FPGA digilent_arty_a7_100t.
</span><span class="pipeline-node-63">+ python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p Grande-Risco-5 -b colorlight_i9 -l
</span><span class="pipeline-new-node" nodeId="65" enclosingId="61">[Pipeline] sh
</span><span class="pipeline-node-65">+ python3 /eda/processor_ci/main.py -c /eda/processor_ci/config -p Grande-Risco-5 -b digilent_arty_a7_100t -l
Makefile executed successfully.
Makefile output:
Flashing the FPGA...
/eda/oss-cad-suite/bin/openFPGALoader -b arty_a7_100t digilent_arty_a7_100t.bit
empty
Jtag frequency : requested 10.00MHz   -&gt; real 10.00MHz  
Open file DONE
Parse file DONE
load program

Load SRAM: [================                                  ] 31.00%
Load SRAM: [================================                  ] 63.00%
Load SRAM: [================================================  ] 95.00%
Load SRAM: [===================================================] 100.00%
Done
Shift IR 35
ir: 1 isc_done 1 isc_ena 0 init 1 done 1

</span><span class="pipeline-new-node" nodeId="66" startId="61">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="67" startId="60">[Pipeline] // dir
</span><span class="pipeline-new-node" nodeId="68" startId="57">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="69" startId="56">[Pipeline] // stage
</span><span class="pipeline-new-node" nodeId="70" startId="70" enclosingId="33">[Pipeline] stage
</span><span class="pipeline-new-node" nodeId="71" startId="71" enclosingId="70" label="Test digilent_arty_a7_100t">[Pipeline] { (Test digilent_arty_a7_100t)
</span><span class="pipeline-new-node" nodeId="72" enclosingId="71">[Pipeline] echo
</span><span class="pipeline-node-72">Testing FPGA digilent_arty_a7_100t.
</span><span class="pipeline-new-node" nodeId="73" startId="73" enclosingId="71">[Pipeline] dir
</span><span class="pipeline-node-73">Running in /var/jenkins_home/workspace/Grande-Risco-5/Grande-Risco-5
</span><span class="pipeline-new-node" nodeId="74" startId="74" enclosingId="73">[Pipeline] {
</span><span class="pipeline-new-node" nodeId="75" enclosingId="74">[Pipeline] sh
</span><span class="pipeline-node-75">+ echo Test for FPGA in /dev/ttyUSB1
Test for FPGA in /dev/ttyUSB1
</span><span class="pipeline-new-node" nodeId="76" enclosingId="74">[Pipeline] sh
</span><span class="pipeline-node-76">+ python3 /eda/processor_ci_tests/main.py -b 115200 -s 2 -c /eda/processor_ci_tests/config.json --p /dev/ttyUSB1 -m rv32i -k 0x41525459
32
Connected to FPGA with ID: b'ARTY'
Checking for sync keyword...
Sync keyword matched.
Testsuite configurated.
Running tests: RV32I in /eda/processor_ci_tests/tests/RV32I
Running basic tests in /eda/processor_ci_tests/tests/RV32I/basic, with breakpoint 60
Running test: 000-addi.hex
Traceback (most recent call last):
  File "/eda/processor_ci_tests/main.py", line 125, in &lt;module&gt;
    main()
  File "/eda/processor_ci_tests/main.py", line 118, in main
    p_tester.run_tests()
  File "/eda/processor_ci_tests/core/__init__.py", line 178, in run_tests
    self._run_test_dir(dir)
  File "/eda/processor_ci_tests/core/__init__.py", line 169, in _run_test_dir
    test_case.result = Failure(
    ^^^^^^^^^^^^^^^^
  File "/usr/lib/python3/dist-packages/junitparser/junitparser.py", line 716, in result
    for entry in value:
TypeError: 'Failure' object is not iterable
</span><span class="pipeline-new-node" nodeId="77" startId="74">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="78" startId="73">[Pipeline] // dir
</span><span class="pipeline-new-node" nodeId="79" startId="71">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="80" startId="70">[Pipeline] // stage
</span><span class="pipeline-new-node" nodeId="81" startId="33">[Pipeline] }
</span><span class="pipeline-node-81">Lock released on resource [Resource: digilent_arty_a7_100t]
</span><span class="pipeline-new-node" nodeId="82" startId="32">[Pipeline] // lock
</span><span class="pipeline-new-node" nodeId="83" startId="29">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="84" startId="28">[Pipeline] // stage
</span><span class="pipeline-new-node" nodeId="85" startId="25">[Pipeline] }
</span><span class="pipeline-node-85">Failed in branch digilent_arty_a7_100t
</span><span class="pipeline-node-63">Makefile executed successfully.
Makefile output:
/eda/oss-cad-suite/bin/openFPGALoader -b colorlight-i9 colorlight_i9.bit
empty
Found 1 compatible device:
	0x0d28 0x0204 0x3 (null)
Open file: DONE
b3bdffff
Parse file: DONE
Enable configuration: DONE
SRAM erase: DONE

Loading: [===                                               ] 5.66%
Loading: [======                                            ] 11.54%
Loading: [=========                                         ] 17.41%
Loading: [============                                      ] 23.07%
Loading: [===============                                   ] 28.95%
Loading: [==================                                ] 34.61%
Loading: [=====================                             ] 40.27%
Loading: [=======================                           ] 45.92%
Loading: [==========================                        ] 51.80%
Loading: [=============================                     ] 57.46%
Loading: [================================                  ] 63.34%
Loading: [===================================               ] 69.21%
Loading: [======================================            ] 75.09%
Loading: [=========================================         ] 80.97%
Loading: [============================================      ] 86.84%
Loading: [===============================================   ] 92.72%
Loading: [==================================================] 98.60%
Loading: [==================================================] 100.00%
Done
Disable configuration: DONE

</span><span class="pipeline-new-node" nodeId="86" startId="59">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="87" startId="58">[Pipeline] // dir
</span><span class="pipeline-new-node" nodeId="88" startId="55">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="89" startId="54">[Pipeline] // stage
</span><span class="pipeline-new-node" nodeId="90" startId="90" enclosingId="31">[Pipeline] stage
</span><span class="pipeline-new-node" nodeId="91" startId="91" enclosingId="90" label="Test colorlight_i9">[Pipeline] { (Test colorlight_i9)
</span><span class="pipeline-new-node" nodeId="92" enclosingId="91">[Pipeline] echo
</span><span class="pipeline-node-92">Testing FPGA colorlight_i9.
</span><span class="pipeline-new-node" nodeId="93" startId="93" enclosingId="91">[Pipeline] dir
</span><span class="pipeline-node-93">Running in /var/jenkins_home/workspace/Grande-Risco-5/Grande-Risco-5
</span><span class="pipeline-new-node" nodeId="94" startId="94" enclosingId="93">[Pipeline] {
</span><span class="pipeline-new-node" nodeId="95" enclosingId="94">[Pipeline] sh
</span><span class="pipeline-node-95">+ echo Test for FPGA in /dev/ttyACM0
Test for FPGA in /dev/ttyACM0
</span><span class="pipeline-new-node" nodeId="96" enclosingId="94">[Pipeline] sh
</span><span class="pipeline-node-96">+ python3 /eda/processor_ci_tests/main.py -b 115200 -s 2 -c /eda/processor_ci_tests/config.json --p /dev/ttyACM0 -m rv32i -k 0x434F4C4F
32
Connected to FPGA with ID: b''
Checking for sync keyword...
Sync keyword mismatch. Expected: b'COLO', Got: b''
</span><span class="pipeline-new-node" nodeId="97" startId="94">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="98" startId="93">[Pipeline] // dir
</span><span class="pipeline-new-node" nodeId="99" startId="91">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="100" startId="90">[Pipeline] // stage
</span><span class="pipeline-new-node" nodeId="101" startId="31">[Pipeline] }
</span><span class="pipeline-node-101">Lock released on resource [Resource: colorlight_i9]
</span><span class="pipeline-new-node" nodeId="102" startId="30">[Pipeline] // lock
</span><span class="pipeline-new-node" nodeId="103" startId="27">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="104" startId="26">[Pipeline] // stage
</span><span class="pipeline-new-node" nodeId="105" startId="24">[Pipeline] }
</span><span class="pipeline-node-105">Failed in branch colorlight_i9
</span><span class="pipeline-new-node" nodeId="106" startId="22">[Pipeline] // parallel
</span><span class="pipeline-new-node" nodeId="107" startId="21">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="108" startId="20">[Pipeline] // stage
</span><span class="pipeline-new-node" nodeId="109" startId="109" enclosingId="4">[Pipeline] stage
</span><span class="pipeline-new-node" nodeId="110" startId="110" enclosingId="109" label="Declarative: Post Actions">[Pipeline] { (Declarative: Post Actions)
</span><span class="pipeline-new-node" nodeId="111" enclosingId="110">[Pipeline] junit
</span><span class="pipeline-node-111">Recording test results
No test report files were found. Configuration error?
</span>Error when executing always post condition:
Also:   org.jenkinsci.plugins.workflow.actions.ErrorAction$ErrorId: 1262a818-3f42-4e64-9b3f-8b9394c77fb0
hudson.AbortException: No test report files were found. Configuration error?
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitParser$ParseResultCallable.invoke(JUnitParser.java:253)
	at hudson.FilePath.act(FilePath.java:1234)
	at hudson.FilePath.act(FilePath.java:1217)
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitParser.parseResult(JUnitParser.java:146)
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitResultArchiver.parse(JUnitResultArchiver.java:177)
	at PluginClassLoader for junit//hudson.tasks.junit.JUnitResultArchiver.parseAndSummarize(JUnitResultArchiver.java:282)
	at PluginClassLoader for junit//hudson.tasks.junit.pipeline.JUnitResultsStepExecution.run(JUnitResultsStepExecution.java:62)
	at PluginClassLoader for junit//hudson.tasks.junit.pipeline.JUnitResultsStepExecution.run(JUnitResultsStepExecution.java:27)
	at PluginClassLoader for workflow-step-api//org.jenkinsci.plugins.workflow.steps.SynchronousNonBlockingStepExecution.lambda$start$0(SynchronousNonBlockingStepExecution.java:49)
	at java.base/java.util.concurrent.Executors$RunnableAdapter.call(Unknown Source)
	at java.base/java.util.concurrent.FutureTask.run(Unknown Source)
	at java.base/java.util.concurrent.ThreadPoolExecutor.runWorker(Unknown Source)
	at java.base/java.util.concurrent.ThreadPoolExecutor$Worker.run(Unknown Source)
	at java.base/java.lang.Thread.run(Unknown Source)

<span class="pipeline-new-node" nodeId="112" startId="110">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="113" startId="109">[Pipeline] // stage
</span><span class="pipeline-new-node" nodeId="114" startId="4">[Pipeline] }
</span><span class="pipeline-new-node" nodeId="115" startId="3">[Pipeline] // node
</span><span class="pipeline-new-node" nodeId="116" startId="2">[Pipeline] End of Pipeline
</span>ERROR: script returned exit code 1
Finished: FAILURE