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.gitignoreMay 1, 2025, 4:35:04 AM537 B
.gitmodulesMay 1, 2025, 4:35:04 AM95 B
build_digilent_arty_a7_100t.tclMay 1, 2025, 4:35:11 AM2.84 KiB
clockInfo.txtMay 1, 2025, 4:36:11 AM375 B
demo1.pdfMay 1, 2025, 4:35:04 AM571.17 KiB
digilent_arty_a7_100t.bitMay 1, 2025, 4:37:06 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptMay 1, 2025, 4:36:15 AM16.56 KiB
digilent_arty_a7_control_sets.rptMay 1, 2025, 4:36:15 AM12.48 KiB
digilent_arty_a7_drc.rptMay 1, 2025, 4:36:47 AM2.36 KiB
digilent_arty_a7_io.rptMay 1, 2025, 4:36:15 AM96.82 KiB
digilent_arty_a7_power.rptMay 1, 2025, 4:36:48 AM8.55 KiB
digilent_arty_a7_route_status.rptMay 1, 2025, 4:36:46 AM651 B
digilent_arty_a7_timing.rptMay 1, 2025, 4:36:47 AM18.47 KiB
digilent_arty_a7_utilization_hierarchical_place.rptMay 1, 2025, 4:36:15 AM3.09 KiB
digilent_arty_a7_utilization_place.rptMay 1, 2025, 4:36:15 AM10.57 KiB
fully-synthesized-trng.pdfMay 1, 2025, 4:35:04 AM1.02 MiB
LICENSEMay 1, 2025, 4:35:04 AM2.43 KiB
mriscv.jpgMay 1, 2025, 4:35:04 AM44.89 KiB
mriscv.pdfMay 1, 2025, 4:35:04 AM3.79 MiB
PID4063257.pdfMay 1, 2025, 4:35:04 AM297.13 KiB
processor_ci_defines.vhMay 1, 2025, 4:35:11 AM300 B
README.mdMay 1, 2025, 4:35:04 AM2.12 KiB
simulation.outMay 1, 2025, 4:35:06 AM173.59 KiB