| .git |
| .Xil |
| tests |
| vhdl |
| alu_int32_div.o | May 9, 2025, 2:14:43 AM | 37.34 KiB | |
| build_digilent_arty_a7_100t.tcl | May 9, 2025, 2:14:51 AM | 2.93 KiB | |
| clockInfo.txt | May 9, 2025, 2:17:02 AM | 375 B | |
| constants.o | May 9, 2025, 2:14:43 AM | 127.38 KiB | |
| control_unit.o | May 9, 2025, 2:14:44 AM | 42.44 KiB | |
| core.o | May 9, 2025, 2:14:44 AM | 193.25 KiB | |
| csr_unit.o | May 9, 2025, 2:14:45 AM | 81.87 KiB | |
| digilent_arty_a7_100t.bit | May 9, 2025, 2:19:08 AM | 3.65 MiB | |
| digilent_arty_a7_clock_utilization.rpt | May 9, 2025, 2:17:15 AM | 16.56 KiB | |
| digilent_arty_a7_control_sets.rpt | May 9, 2025, 2:17:14 AM | 12.48 KiB | |
| digilent_arty_a7_drc.rpt | May 9, 2025, 2:18:39 AM | 2.36 KiB | |
| digilent_arty_a7_io.rpt | May 9, 2025, 2:17:14 AM | 96.82 KiB | |
| digilent_arty_a7_power.rpt | May 9, 2025, 2:18:40 AM | 8.55 KiB | |
| digilent_arty_a7_route_status.rpt | May 9, 2025, 2:18:36 AM | 651 B | |
| digilent_arty_a7_timing.rpt | May 9, 2025, 2:18:39 AM | 18.47 KiB | |
| digilent_arty_a7_utilization_hierarchical_place.rpt | May 9, 2025, 2:17:13 AM | 3.09 KiB | |
| digilent_arty_a7_utilization_place.rpt | May 9, 2025, 2:17:14 AM | 10.57 KiB | |
| LICENSE | May 9, 2025, 2:14:42 AM | 11.09 KiB | |
| lint_unit.o | May 9, 2025, 2:14:45 AM | 28.51 KiB | |
| mem_controller.o | May 9, 2025, 2:14:45 AM | 32.66 KiB | |
| pc_unit.o | May 9, 2025, 2:14:45 AM | 12.58 KiB | |
| processor_ci_defines.vh | May 9, 2025, 2:14:51 AM | 300 B | |
| README.md | May 9, 2025, 2:14:42 AM | 1.24 KiB | |
| register_set.o | May 9, 2025, 2:14:45 AM | 22.12 KiB | |
| rpu_core_diagram.png | May 9, 2025, 2:14:42 AM | 87.03 KiB | |
| unit_alu_RV32_I.o | May 9, 2025, 2:14:46 AM | 85.27 KiB | |
| unit_decoder_RV32I.o | May 9, 2025, 2:14:47 AM | 68.66 KiB | |
| work-obj08.cf | May 9, 2025, 2:14:46 AM | 2.16 KiB | |
|