| .git |
| .github |
| .Xil |
| docs |
| fpga |
| software |
| src |
| tests |
| .gitattributes | Apr 28, 2025, 4:55:03 AM | 29 B | |
| .gitignore | Apr 28, 2025, 4:55:03 AM | 21 B | |
| build_digilent_arty_a7_100t.tcl | Apr 28, 2025, 4:55:10 AM | 2.99 KiB | |
| clockInfo.txt | Apr 28, 2025, 4:56:06 AM | 375 B | |
| digilent_arty_a7_100t.bit | Apr 28, 2025, 4:57:01 AM | 3.65 MiB | |
| digilent_arty_a7_clock_utilization.rpt | Apr 28, 2025, 4:56:10 AM | 16.56 KiB | |
| digilent_arty_a7_control_sets.rpt | Apr 28, 2025, 4:56:10 AM | 12.48 KiB | |
| digilent_arty_a7_drc.rpt | Apr 28, 2025, 4:56:42 AM | 2.36 KiB | |
| digilent_arty_a7_io.rpt | Apr 28, 2025, 4:56:10 AM | 96.82 KiB | |
| digilent_arty_a7_power.rpt | Apr 28, 2025, 4:56:43 AM | 8.55 KiB | |
| digilent_arty_a7_route_status.rpt | Apr 28, 2025, 4:56:41 AM | 651 B | |
| digilent_arty_a7_timing.rpt | Apr 28, 2025, 4:56:42 AM | 18.47 KiB | |
| digilent_arty_a7_utilization_hierarchical_place.rpt | Apr 28, 2025, 4:56:10 AM | 3.09 KiB | |
| digilent_arty_a7_utilization_place.rpt | Apr 28, 2025, 4:56:10 AM | 10.57 KiB | |
| LICENSE | Apr 28, 2025, 4:55:03 AM | 1.05 KiB | |
| processor_ci_defines.vh | Apr 28, 2025, 4:55:10 AM | 300 B | |
| README.md | Apr 28, 2025, 4:55:03 AM | 2.08 KiB | |
| simulation.out | Apr 28, 2025, 4:55:05 AM | 56.82 KiB | |
|