Skip to content

Workspace

/ DV-CPU-RV /
.git
.Xil
core
docs
refs
src
.gitignoreMay 7, 2025, 4:58:41 AM140 B
build_digilent_arty_a7_100t.tclMay 7, 2025, 4:58:48 AM3.40 KiB
clean.plMay 7, 2025, 4:58:41 AM345 B
clockInfo.txtMay 7, 2025, 5:00:59 AM375 B
digilent_arty_a7_100t.bitMay 7, 2025, 5:03:04 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptMay 7, 2025, 5:01:11 AM16.56 KiB
digilent_arty_a7_control_sets.rptMay 7, 2025, 5:01:10 AM12.48 KiB
digilent_arty_a7_drc.rptMay 7, 2025, 5:02:35 AM2.36 KiB
digilent_arty_a7_io.rptMay 7, 2025, 5:01:10 AM96.82 KiB
digilent_arty_a7_power.rptMay 7, 2025, 5:02:36 AM8.55 KiB
digilent_arty_a7_route_status.rptMay 7, 2025, 5:02:33 AM651 B
digilent_arty_a7_timing.rptMay 7, 2025, 5:02:35 AM18.47 KiB
digilent_arty_a7_utilization_hierarchical_place.rptMay 7, 2025, 5:01:10 AM3.09 KiB
digilent_arty_a7_utilization_place.rptMay 7, 2025, 5:01:10 AM10.57 KiB
LICENSEMay 7, 2025, 4:58:41 AM34.33 KiB
processor_ci_defines.vhMay 7, 2025, 4:58:48 AM300 B
README_zh_CN.mdMay 7, 2025, 4:58:41 AM2.18 KiB
README.mdMay 7, 2025, 4:58:41 AM2.27 KiB
simulation.outMay 7, 2025, 4:58:43 AM103.73 KiB