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Build #204

Console
Pipeline
Git Clone
Verilog Convert
Simulation
Utilities
Synthesis and PnR
Flash digilent_arty_a7_100t
Test digilent_arty_a7_100t
Post Actions
Start
Git Clone
Verilog Convert
Simulation
Utilities
FPGA Build Pipeline
Post Actions
End
Synthesis and PnR
Flash digilent_arty_a7_100t
Test digilent_arty_a7_100t
digilent_arty_a7_100t
Details

Started 14 hr ago

Queued 2 ms

Took 2 min 34 sec