Skip to content
[Jenkins]Jenkins
log in

Build #201

Console
Pipeline
Git Clone
Verilog Convert
Simulation
Utilities
Synthesis and PnR
Flash digilent_arty_a7_100t
Test digilent_arty_a7_100t
Post Actions
Start
Git Clone
Verilog Convert
Simulation
Utilities
FPGA Build Pipeline
Post Actions
End
Synthesis and PnR
Flash digilent_arty_a7_100t
Test digilent_arty_a7_100t
digilent_arty_a7_100t
Details

Started 4 days 5 hr ago

Queued 9 ms

Took 56 sec