About

This project aims to provide a continuous integration (CI) environment for open-source RISC-V processors using Field-Programmable Gate Arrays (FPGAs) from various manufacturers. The CI environment is integrated with a system that connects directly to the GitHub repository to automatically fetch each new commit in a processor, facilitating a seamless CI flow across different FPGA platforms. The project is part of the Laboratory of Computer Systems at the Institute of Computing of the University of Campinas.

Developers

• Research advisor: Rodolfo Azevedo

• Master's student: Gabriel P Gomes

• Undergraduate students:

  • Angelo Malaguti
  • Enrico Fernandes
  • Enzo Bertoloti
  • Gabriel Oliveira
  • Julio Avelar
  • Victor Lago

Papers

• ProcessorCI: Integração Contínua para processadores RISC-V em FPGAs

Licenses

Hardware License: CERN-OHL-P-2.0

Software License: MIT

Documentation License: CC BY-SA 4.0